Subject: linux-next: manual merge of the usb tree with the imx-mxs tree

From: Stephen Rothwell <[email-masked]>
Date: Wed, 9 Jul 2025 17:21:38 +1000

Hi all,

Today's linux-next merge of the usb tree got conflicts in:

  arch/arm64/boot/dts/freescale/s32g2.dtsi
  arch/arm64/boot/dts/freescale/s32g3.dtsi

between commit:

  06ee2f0e2180 ("arm64: dts: Add DSPI entries for S32G platforms")

from the imx-mxs tree and commit:

  d1b07cc0868f ("arm64: dts: s32g: Add USB device tree information for s32g2/s32g3")

from the usb tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc arch/arm64/boot/dts/freescale/s32g2.dtsi
index da79bb9daa35,4be6534ed01d..000000000000
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@@ -384,45 -376,29 +384,68 @@@
  			status = "disabled";
  		};
  
 +		spi0: spi@401d4000 {
 +			compatible = "nxp,s32g2-dspi";
 +			reg = <0x401d4000 0x1000>;
 +			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 +			clocks = <&clks 26>;
 +			clock-names = "dspi";
 +			spi-num-chipselects = <8>;
 +			bus-num = <0>;
 +			dmas = <&edma0 0 7>, <&edma0 0 8>;
 +			dma-names = "tx", "rx";
 +			status = "disabled";
 +		};
 +
 +		spi1: spi@401d8000 {
 +			compatible = "nxp,s32g2-dspi";
 +			reg = <0x401d8000 0x1000>;
 +			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 +			clocks = <&clks 26>;
 +			clock-names = "dspi";
 +			spi-num-chipselects = <5>;
 +			bus-num = <1>;
 +			dmas = <&edma0 0 10>, <&edma0 0 11>;
 +			dma-names = "tx", "rx";
 +			status = "disabled";
 +		};
 +
 +		spi2: spi@401dc000 {
 +			compatible = "nxp,s32g2-dspi";
 +			reg = <0x401dc000 0x1000>;
 +			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 +			clocks = <&clks 26>;
 +			clock-names = "dspi";
 +			spi-num-chipselects = <5>;
 +			bus-num = <2>;
 +			dmas = <&edma0 0 13>, <&edma0 0 14>;
 +			dma-names = "tx", "rx";
 +			status = "disabled";
 +		};
 +
+ 		usbmisc: usbmisc@44064200 {
+ 			#index-cells = <1>;
+ 			compatible = "nxp,s32g2-usbmisc";
+ 			reg = <0x44064200 0x200>;
+ 		};
+ 
+ 		usbotg: usb@44064000 {
+ 			compatible = "nxp,s32g2-usb";
+ 			reg = <0x44064000 0x200>;
+ 			interrupt-parent = <&gic>;
+ 			interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, /* OTG Core */
+ 					 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; /* OTG Wakeup */
+ 			clocks = <&clks 94>, <&clks 95>;
+ 			fsl,usbmisc = <&usbmisc 0>;
+ 			ahb-burst-config = <0x3>;
+ 			tx-burst-size-dword = <0x10>;
+ 			rx-burst-size-dword = <0x10>;
+ 			phy_type = "ulpi";
+ 			dr_mode = "host";
+ 			maximum-speed = "high-speed";
+ 			status = "disabled";
+ 		};
+ 
  		i2c0: i2c@401e4000 {
  			compatible = "nxp,s32g2-i2c";
  			reg = <0x401e4000 0x1000>;
diff --cc arch/arm64/boot/dts/freescale/s32g3.dtsi
index 9af35e82fdc9,191d2dab4254..000000000000
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@@ -444,45 -435,29 +444,68 @@@
  			status = "disabled";
  		};
  
 +		spi0: spi@401d4000 {
 +			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";
 +			reg = <0x401d4000 0x1000>;
 +			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 +			clocks = <&clks 26>;
 +			clock-names = "dspi";
 +			spi-num-chipselects = <8>;
 +			bus-num = <0>;
 +			dmas = <&edma0 0 7>, <&edma0 0 8>;
 +			dma-names = "tx", "rx";
 +			status = "disabled";
 +		};
 +
 +		spi1: spi@401d8000 {
 +			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";
 +			reg = <0x401d8000 0x1000>;
 +			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 +			clocks = <&clks 26>;
 +			clock-names = "dspi";
 +			spi-num-chipselects = <5>;
 +			bus-num = <1>;
 +			dmas = <&edma0 0 10>, <&edma0 0 11>;
 +			dma-names = "tx", "rx";
 +			status = "disabled";
 +		};
 +
 +		spi2: spi@401dc000 {
 +			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";
 +			reg = <0x401dc000 0x1000>;
 +			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 +			clocks = <&clks 26>;
 +			clock-names = "dspi";
 +			spi-num-chipselects = <5>;
 +			bus-num = <2>;
 +			dmas = <&edma0 0 13>, <&edma0 0 14>;
 +			dma-names = "tx", "rx";
 +			status = "disabled";
 +		};
 +
+ 		usbmisc: usbmisc@44064200 {
+ 			#index-cells = <1>;
+ 			compatible = "nxp,s32g3-usbmisc";
+ 			reg = <0x44064200 0x200>;
+ 		};
+ 
+                 usbotg: usb@44064000 {
+                         compatible = "nxp,s32g3-usb", "nxp,s32g2-usb";
+                         reg = <0x44064000 0x200>;
+                         interrupt-parent = <&gic>;
+                         interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, /* OTG Core */
+                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; /* OTG Wakeup */
+                         clocks = <&clks 94>, <&clks 95>;
+                         fsl,usbmisc = <&usbmisc 0>;
+                         ahb-burst-config = <0x3>;
+                         tx-burst-size-dword = <0x10>;
+                         rx-burst-size-dword = <0x10>;
+                         phy_type = "ulpi";
+                         dr_mode = "host";
+                         maximum-speed = "high-speed";
+                         status = "disabled";
+                 };
+ 
  		i2c0: i2c@401e4000 {
  			compatible = "nxp,s32g3-i2c",
  				     "nxp,s32g2-i2c";