Subject: linux-next: manual merge of the nand tree with the mtd-fixes/mtd/fixes tree

From: Thierry Reding <[email-masked]>
Date: Wed, 29 Apr 2026 12:07:16 +0200

Hi all,

Today's linux-next merge of the nand tree got a conflict in:

  drivers/mtd/nand/spi/winbond.c

between commit:

  8d655748aba1 ("mtd: spinand: winbond: Set the packed page read flag to W35N02/04JW")

from the mtd-fixes/mtd/fixes tree and commits:

  9980ff0d528f ("mtd: spinand: winbond: Add support for continuous reads on W35NxxJW")
  a211bd1ecc0b ("mtd: spinand: winbond: Ensure chips are ordered by density")

from the nand tree.

I don't know if I fixed it up correctly (see below) and can carry the fix
as necessary. This is now fixed as far as linux-next is concerned, but any
non trivial conflicts should be mentioned to your upstream maintainer when
your tree is submitted for merging.  You may also want to consider
cooperating with the maintainer of the conflicting tree to minimise any
particularly complex conflicts.

diff --cc drivers/mtd/nand/spi/winbond.c
index 7cc0f0091430,578f702528ee..9ae397f17730
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@@ -504,35 -685,15 +685,14 @@@ static const struct spinand_info winbon
  		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdc, 0x21),
  		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 1, 1),
  		     NAND_ECCREQ(1, 512),
- 		     SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,
- 					      &write_cache_octal_variants,
- 					      &update_cache_octal_variants),
- 		     0,
- 		     SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),
- 		     SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),
- 		     SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),
- 	SPINAND_INFO("W35N02JW", /* 1.8V */
- 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),
- 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),
- 		     NAND_ECCREQ(1, 512),
- 		     SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,
- 					      &write_cache_octal_variants,
- 					      &update_cache_octal_variants),
+ 		     SPINAND_INFO_OP_VARIANTS_WITH_CONT(&read_cache_octal_variants,
+ 							&write_cache_octal_variants,
+ 							&update_cache_octal_variants,
+ 							&cont_read_cache_octal_variants),
 -		     0,
 +		     SPINAND_ODTR_PACKED_PAGE_READ,
  		     SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),
- 		     SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),
- 		     SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),
- 	SPINAND_INFO("W35N04JW", /* 1.8V */
- 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),
- 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),
- 		     NAND_ECCREQ(1, 512),
- 		     SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,
- 					      &write_cache_octal_variants,
- 					      &update_cache_octal_variants),
- 		     SPINAND_ODTR_PACKED_PAGE_READ,
- 		     SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),
- 		     SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),
+ 		     SPINAND_ECCINFO(&w35n01jw_ooblayout, w25w35nxxjw_ecc_get_status),
 -		     SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg),
 -		     SPINAND_CONT_READ(w35n0xjw_set_cont_read)),
 +		     SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),
  	/* 2G-bit densities */
  	SPINAND_INFO("W25M02GV", /* 2x1G-bit 3.3V */
  		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xab, 0x21),
@@@ -573,6 -736,19 +735,18 @@@
  					      &update_cache_variants),
  		     0,
  		     SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
+ 	SPINAND_INFO("W35N02JW", /* 1.8V */
+ 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),
+ 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),
+ 		     NAND_ECCREQ(1, 512),
+ 		     SPINAND_INFO_OP_VARIANTS_WITH_CONT(&read_cache_octal_variants,
+ 							&write_cache_octal_variants,
+ 							&update_cache_octal_variants,
+ 							&cont_read_cache_octal_variants),
 -		     0,
++		     SPINAND_ODTR_PACKED_PAGE_READ,
+ 		     SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),
+ 		     SPINAND_ECCINFO(&w35n01jw_ooblayout, w25w35nxxjw_ecc_get_status),
 -		     SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg),
 -		     SPINAND_CONT_READ(w35n0xjw_set_cont_read)),
++		     SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),
  	/* 4G-bit densities */
  	SPINAND_INFO("W25N04KV", /* 3.3V */
  		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x23),
@@@ -592,6 -768,19 +766,18 @@@
  					      &update_cache_variants),
  		     0,
  		     SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
+ 	SPINAND_INFO("W35N04JW", /* 1.8V */
+ 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),
+ 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),
+ 		     NAND_ECCREQ(1, 512),
+ 		     SPINAND_INFO_OP_VARIANTS_WITH_CONT(&read_cache_octal_variants,
+ 							&write_cache_octal_variants,
+ 							&update_cache_octal_variants,
+ 							&cont_read_cache_octal_variants),
 -		     0,
++		     SPINAND_ODTR_PACKED_PAGE_READ,
+ 		     SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),
+ 		     SPINAND_ECCINFO(&w35n01jw_ooblayout, w25w35nxxjw_ecc_get_status),
 -		     SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg),
 -		     SPINAND_CONT_READ(w35n0xjw_set_cont_read)),
++		     SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),
  };
  
  static int winbond_spinand_init(struct spinand_device *spinand)