Subject: linux-next: manual merge of the kvm-x86 tree with the tip tree

From: Mark Brown <[email-masked]>
Date: Fri, 19 Sep 2025 14:50:46 +0100

Hi all,

Today's linux-next merge of the kvm-x86 tree got a conflict in:

  arch/x86/include/asm/msr-index.h

between commit:

  0c5caea762de3 ("perf/x86: Add PERF_CAP_PEBS_TIMING_INFO flag")

from the tip tree and commit:

  cdfed9370b96a ("KVM: x86/pmu: Move PMU_CAP_{FW_WRITES,LBR_FMT} into msr-index.h header")

from the kvm-x86 tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

diff --cc arch/x86/include/asm/msr-index.h
index 718a55d82fe45,717baeba6db3c..0000000000000
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@@ -315,14 -315,15 +315,16 @@@
  #define PERF_CAP_PT_IDX			16
  
  #define MSR_PEBS_LD_LAT_THRESHOLD	0x000003f6
 -
+ #define PERF_CAP_LBR_FMT		0x3f
  #define PERF_CAP_PEBS_TRAP		BIT_ULL(6)
  #define PERF_CAP_ARCH_REG		BIT_ULL(7)
  #define PERF_CAP_PEBS_FORMAT		0xf00
+ #define PERF_CAP_FW_WRITES		BIT_ULL(13)
  #define PERF_CAP_PEBS_BASELINE		BIT_ULL(14)
 +#define PERF_CAP_PEBS_TIMING_INFO	BIT_ULL(17)
  #define PERF_CAP_PEBS_MASK		(PERF_CAP_PEBS_TRAP | PERF_CAP_ARCH_REG | \
 -					 PERF_CAP_PEBS_FORMAT | PERF_CAP_PEBS_BASELINE)
 +					 PERF_CAP_PEBS_FORMAT | PERF_CAP_PEBS_BASELINE | \
 +					 PERF_CAP_PEBS_TIMING_INFO)
  
  #define MSR_IA32_RTIT_CTL		0x00000570
  #define RTIT_CTL_TRACEEN		BIT(0)