Subject: Re: [PATCH] Workaround for 745x data corruption bug

From: Adrian Cox <[email-masked]>
Date: Wed, 04 Aug 2004 21:39:24 +0100

On Wed, 2004-08-04 at 18:55, Mark A. Greer wrote:
> 1) M=1 is only necessary in an SMP environment (or for the 745x erratum).

And the reason we have to turn it on for the MPC10x bridges is that they
contain their own cache. Even though it only has two cache lines, it has
to be treated as a second processor for coherence purposes.

- Adrian Cox
Humboldt Solutions Ltd.

** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/