From: Till Wimmer <linuxppc-dev@tonarchiv•ch>
To: linuxppc-dev@ozlabs•org
Subject: L3 cache on Apple dual processor (7450 r 2.1) question
Date: Mon, 19 Jun 2006 16:17:04 +0200 [thread overview]
Message-ID: <1150726624.4711.16.camel@localhost.localdomain> (raw)
Hello,
i tried to enable the L3 cache on my dual 800MHz processor board (taken
from Quicksilver). I'm running the 2.6.8-3-powerpc-smp kernel from
Debian.
I changed the code for in core99_init_caches() in
arch/ppc/platforms/pmac_smp.c because the cache wasn't enabled by
default:
if (cpu == 0){
_set_L3CR(0);
_set_L3CR(0x9F424340);
core99_l3_cache = _get_L3CR();
printk("CPU0: L3CR is %lx\n", core99_l3_cache);
} else {
printk("CPU%d: L3CR was %lx\n", cpu, _get_L3CR());
_set_L3CR(0);
_set_L3CR(core99_l3_cache);
printk("CPU%d: L3CR is %lx\n", cpu, _get_L3CR());
}
Now my questions are:
Is there anything else to do for getting the L3 cache working?
How can i check if the L3 is enabled? E.g. is there a benchmark program
which accounts for cache settings?
Thanx
Till
next reply other threads:[~2006-06-19 14:33 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-06-19 14:17 Till Wimmer [this message]
2006-06-19 14:36 ` L3 cache on Apple dual processor (7450 r 2.1) question Olof Johansson
2006-06-20 13:27 ` Till Wimmer
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