Subject: L3 cache on Apple dual processor (7450 r 2.1) question

From: Till Wimmer <[email-masked]>
Date: Mon, 19 Jun 2006 16:17:04 +0200

Hello,

i tried to enable the L3 cache on my dual 800MHz processor board (taken
from Quicksilver). I'm running the 2.6.8-3-powerpc-smp kernel from
Debian.

I changed the code for in core99_init_caches() in
arch/ppc/platforms/pmac_smp.c because the cache wasn't enabled by
default:

        if (cpu == 0){
                _set_L3CR(0);
                _set_L3CR(0x9F424340);
                core99_l3_cache = _get_L3CR();
                printk("CPU0: L3CR is %lx\n", core99_l3_cache);
        } else {
                printk("CPU%d: L3CR was %lx\n", cpu, _get_L3CR());
                _set_L3CR(0);
                _set_L3CR(core99_l3_cache);
		printk("CPU%d: L3CR is %lx\n", cpu, _get_L3CR());
        }
Now my questions are:
Is there anything else to do for getting the L3 cache working?
How can i check if the L3 is enabled? E.g. is there a benchmark program
which accounts for cache settings?

Thanx
Till