Subject: Re: [PATCH] Fix the LPC47M192 SuperIO on the MPC8641 HPCN

From: Wade Farnsworth <[email-masked]>
Date: Thu, 07 Jun 2007 09:42:45 -0700

On Thu, 2007-06-07 at 15:01 +0200, Segher Boessenkool wrote:
> > +	/* enable superio @ 0x4e and keyboard/mouse address decoding */
> > +	pci_write_config_byte(dev, 0x63, 0x90);
> 
> I doubt that comment is accurate.

m1575 legacy interface device register 0x63 is the legacy I/O decoding
control.

Writing 0x90 enables ports 0x4e and 0x4f for Super I/O configuration and
ports 0x60 and 0x64 for keyboard/mouse.

> 
> > +	outb(0x07, 0x4e);	/* device selector register */
> > +	outb(0x07, 0x4f);	/* select keyboard registers (device 7) */
> 
> Please abstract out the 4e,4f access sequence, so
> you can just say  write_sio(0x30, 1);  or similar.

Sure.

> 
> > +	/* Enable superio runtime registers for gpio in pci i/o space */
> > +	outb(0x20, 0x4e);	/* device id register */
> 
> This write is superfluous as far as I can see.

Yes, it appears so.  I'll remove it.

--Wade