Subject: Re: [PATCH v2] mtd/nand : workaround for Freescale FCM to support large-page Nand chip

From: Artem Bityutskiy <[email-masked]>
Date: Mon, 15 Aug 2011 18:59:09 +0300

On Tue, 2011-07-12 at 12:48 +0800, [email-masked] wrote:
> +	/*
> +	 * Hack for supporting the flash chip whose writesize is
> +	 * larger than 2K bytes.
> +	 */
> +	if (mtd->writesize > 2048) {
> +		elbc_fcm_ctrl->subpage_shift = ffs(mtd->writesize >> 11) - 1;
> +		elbc_fcm_ctrl->subpage_mask =
> +			(1 << elbc_fcm_ctrl->subpage_shift) - 1;
> +		/*
> +		 * Rewrite mtd->writesize, mtd->oobsize, chip->page_shift
> +		 * and chip->pagemask.
> +		 */
> +		mtd->writesize = 2048;
> +		mtd->oobsize = 64;
> +		chip->page_shift = ffs(mtd->writesize) - 1;
> +		chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
> +	}

So basically if the flash has 4KiB NAND pages, you are considering it as
a flash with 2KiB NAND pages. But surely this will work only if the
underlying flash has NOP 2 at least. Or even, if you consider that JFFS2
and YAFFS want to write to OOB, you need NOP 4 (2 ECC writes and 2
writes from YAFFS/JFFS2) ? So this won't work for NOP1 flashes? Isn't it
an ugly hack?

-- 
Best Regards,
Artem Bityutskiy