From: Aaron Sierra <asierra@xes-inc•com>
To: linuxppc-dev@lists•ozlabs.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation•org>,
Arnd Bergmann <arnd@arndb•de>,
Prabhakar Kushwaha <prabhakar@freescale•com>
Subject: [PATCH 1/2] fsl_ifc: Fix csor_ext position in fsl_ifc_regs
Date: Fri, 15 Aug 2014 16:07:48 -0500 (CDT) [thread overview]
Message-ID: <1346443438.56997.1408136868975.JavaMail.zimbra@xes-inc.com> (raw)
In-Reply-To: <420065698.56284.1408136539532.JavaMail.zimbra@xes-inc.com>
According to Freescale manuals, the IFC_CSORn_EXT register is located
immediately _after_ the bank's IFC_CSORn register.
This patch adjusts the csor_ext member of and reserved register arrays
immediately surrounding the csor_cs structure to provide proper access
to this register.
Signed-off-by: Aaron Sierra <asierra@xes-inc•com>
---
include/linux/fsl_ifc.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/linux/fsl_ifc.h b/include/linux/fsl_ifc.h
index f49ddb1..84d60cb 100644
--- a/include/linux/fsl_ifc.h
+++ b/include/linux/fsl_ifc.h
@@ -781,13 +781,13 @@ struct fsl_ifc_regs {
__be32 amask;
u32 res4[0x2];
} amask_cs[FSL_IFC_BANK_COUNT];
- u32 res5[0x17];
+ u32 res5[0x18];
struct {
- __be32 csor_ext;
__be32 csor;
+ __be32 csor_ext;
u32 res6;
} csor_cs[FSL_IFC_BANK_COUNT];
- u32 res7[0x19];
+ u32 res7[0x18];
struct {
__be32 ftim[4];
u32 res8[0x8];
--
1.9.1
next parent reply other threads:[~2014-08-15 21:46 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <420065698.56284.1408136539532.JavaMail.zimbra@xes-inc.com>
2014-08-15 21:07 ` Aaron Sierra [this message]
2014-08-20 4:05 ` [PATCH 1/2] fsl_ifc: Fix csor_ext position in fsl_ifc_regs Prabhakar Kushwaha
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