Subject: Re: Why is the e500v2 core not using cpuidle?

From: Scott Wood <[email-masked]>
Date: Fri, 1 Feb 2013 12:15:17 -0600

On 02/01/2013 06:06:05 AM, Thomas Waldecker wrote:
> Hi,
>=20
> As part of my masterthesis I was just looking around the kernel
> sources for cpuidle and figured out that the only CPU in the PowerPC
> architecture using the cpuidle framework is the pseries.
>=20
> I assume the e500v2 core is using the idle modes
> in arch/powerpc/kernel/idle_e500.S
>=20
> Why is there no support for the cpuidle framework?

Because nobody implemented it. :-)

The only reason I can think of to implement it on this chip would be to =20
dynamically choose when to enter nap versus doze, rather than always =20
just using doze.  It's not clear whether the difference in power =20
savings is worth it -- do you have any way of measuring?

> How can I debug the e500 idle modes?
> Are there any statistics?

Top reports idle percentage...

> I already ran PowerTOP on a QorIQ P2020 but it's almost useless
> because the information is missing.

What information are you looking for?

-Scott=