From: Scott Wood <scottwood@freescale•com>
To: Kumar Gala <galak@kernel•crashing.org>
Cc: linuxppc-dev@ozlabs•org
Subject: Re: [PATCH 5/8] powerpc/fsl-booke: Add initial silicon device tree for
Date: Tue, 5 Mar 2013 18:15:55 -0600 [thread overview]
Message-ID: <1362528955.25308.12@snotra> (raw)
In-Reply-To: <1362525360-23136-5-git-send-email-galak@kernel.crashing.org> (from galak@kernel.crashing.org on Tue Mar 5 17:15:57 2013)
On 03/05/2013 05:15:57 PM, Kumar Gala wrote:
> Enable a baseline T4240 SoC to boot. There are several things missing
> from the device trees for T4240:
>=20
> * Thread support on e6500
Why did threads get removed from the device tree? It's supposed to =20
describe hardware, not what Linux currently supports.
> * Proper PAMU topology information
> * DPAA related nodes (Qman, Bman, Fman, Rman, DCE)
> * Prefetch Manager
> * Thermal monitor unit
> * Interlaken
The dts should be marked preliminary somehow -- we really should get =20
out of the habit of letting device nodes trickle in as drivers get =20
added.
> +/* controller at 0x240000 */
> +&pci0 {
> + compatible =3D "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
We have a version register -- do we really need to keep sticking the =20
version number in the compatible? Note that we've had device trees =20
that specified the version incorrectly in the past.
> + device_type =3D "pci";
> + #size-cells =3D <2>;
> + #address-cells =3D <3>;
> + bus-range =3D <0x0 0xff>;
> + clock-frequency =3D <33333333>;
This clock-frequency is not correct (I doubt it's needed at all).
> + PowerPC,e6500@1 {
> + device_type =3D "cpu";
> + reg =3D <2>;
> + next-level-cache =3D <&L2_1>;
> + };
> + PowerPC,e6500@2 {
> + device_type =3D "cpu";
> + reg =3D <4>;
> + next-level-cache =3D <&L2_1>;
> + };
> + PowerPC,e6500@3 {
> + device_type =3D "cpu";
> + reg =3D <6>;
> + next-level-cache =3D <&L2_1>;
> + };
> +
> + PowerPC,e6500@4 {
> + device_type =3D "cpu";
> + reg =3D <8>;
> + next-level-cache =3D <&L2_2>;
> + };
Inconsistent whitespace.
As usual, the pre/post split is unnecessary. Everything in it can go =20
in post.
-Scott=
next prev parent reply other threads:[~2013-03-06 0:16 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-05 23:15 [PATCH 1/8] powerpc/85xx: Added SEC-5.0 device tree Kumar Gala
2013-03-05 23:15 ` [PATCH 2/8] powerpc/85xx: Add support for FSL PCIe controller v3.0 Kumar Gala
2013-03-05 23:15 ` [PATCH 3/8] powerpc/fsl-booke: Support detection of page sizes on Kumar Gala
2013-03-05 23:15 ` [PATCH 4/8] powerpc/85xx: Add AltiVec support for e6500 Kumar Gala
2013-03-05 23:15 ` [PATCH 5/8] powerpc/fsl-booke: Add initial silicon device tree for Kumar Gala
2013-03-05 23:15 ` [PATCH 6/8] powerpc/fsl-booke: Add initial T4240QDS board device Kumar Gala
2013-03-05 23:15 ` [PATCH 7/8] powerpc/fsl-booke: Add initial T4240QDS board support Kumar Gala
2013-03-05 23:16 ` [PATCH 8/8] powerpc/85xx: Update corenet64_smp_defconfig for T4240 Kumar Gala
2013-03-12 21:15 ` Kumar Gala
2013-03-12 21:16 ` [PATCH 7/8] powerpc/fsl-booke: Add initial T4240QDS board support Kumar Gala
2013-03-12 21:15 ` [PATCH 6/8] powerpc/fsl-booke: Add initial T4240QDS board device Kumar Gala
2013-03-06 0:15 ` Scott Wood [this message]
2013-03-07 17:09 ` [PATCH 5/8] powerpc/fsl-booke: Add initial silicon device tree for Kumar Gala
2013-03-07 17:47 ` Scott Wood
2013-03-07 19:53 ` Kumar Gala
2013-03-06 11:02 ` Roy Zang
2013-03-12 21:15 ` [PATCH 3/8] powerpc/fsl-booke: Support detection of page sizes on Kumar Gala
2013-03-12 21:15 ` [PATCH 2/8] powerpc/85xx: Add support for FSL PCIe controller v3.0 Kumar Gala
2013-03-12 21:14 ` [PATCH 1/8] powerpc/85xx: Added SEC-5.0 device tree Kumar Gala
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