From: Scott Wood <scottwood@freescale•com>
To: Kumar Gala <galak@kernel•crashing.org>
Cc: linuxppc-dev@ozlabs•org
Subject: Re: [PATCH 5/8] powerpc/fsl-booke: Add initial silicon device tree for
Date: Thu, 7 Mar 2013 11:47:50 -0600 [thread overview]
Message-ID: <1362678470.23227.5@snotra> (raw)
In-Reply-To: <FFA4082B-0C61-43F6-BB84-2C5A25476814@kernel.crashing.org> (from galak@kernel.crashing.org on Thu Mar 7 11:09:50 2013)
On 03/07/2013 11:09:50 AM, Kumar Gala wrote:
>=20
> On Mar 5, 2013, at 6:15 PM, Scott Wood wrote:
>=20
> > On 03/05/2013 05:15:57 PM, Kumar Gala wrote:
> >> Enable a baseline T4240 SoC to boot. There are several things =20
> missing
> >> from the device trees for T4240:
> >> * Thread support on e6500
> >
> > Why did threads get removed from the device tree? It's supposed to =20
> describe hardware, not what Linux currently supports.
>=20
> will fix, was concerned if we'd be able to boot if they exited
I don't think it'd be a problem (and if it is, then fix Linux).
> >> + device_type =3D "pci";
> >> + #size-cells =3D <2>;
> >> + #address-cells =3D <3>;
> >> + bus-range =3D <0x0 0xff>;
> >> + clock-frequency =3D <33333333>;
> >
> > This clock-frequency is not correct (I doubt it's needed at all).
>=20
> I can zero the field, but its spec'd by pci binding
If we aren't going to put a correct value in, is zero better than =20
omitting it entirely?
There are other properties in the PCI binding that we don't have, such =20
as slot-names. I don't see any language in the PCI binding that says =20
one is required but the other isn't.
And shouldn't we be using the PCI express binding (device_type =3D =20
"pciex", or just get rid of it since this isn't real OF)?
-Scott=
next prev parent reply other threads:[~2013-03-07 17:48 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-05 23:15 [PATCH 1/8] powerpc/85xx: Added SEC-5.0 device tree Kumar Gala
2013-03-05 23:15 ` [PATCH 2/8] powerpc/85xx: Add support for FSL PCIe controller v3.0 Kumar Gala
2013-03-05 23:15 ` [PATCH 3/8] powerpc/fsl-booke: Support detection of page sizes on Kumar Gala
2013-03-05 23:15 ` [PATCH 4/8] powerpc/85xx: Add AltiVec support for e6500 Kumar Gala
2013-03-05 23:15 ` [PATCH 5/8] powerpc/fsl-booke: Add initial silicon device tree for Kumar Gala
2013-03-05 23:15 ` [PATCH 6/8] powerpc/fsl-booke: Add initial T4240QDS board device Kumar Gala
2013-03-05 23:15 ` [PATCH 7/8] powerpc/fsl-booke: Add initial T4240QDS board support Kumar Gala
2013-03-05 23:16 ` [PATCH 8/8] powerpc/85xx: Update corenet64_smp_defconfig for T4240 Kumar Gala
2013-03-12 21:15 ` Kumar Gala
2013-03-12 21:16 ` [PATCH 7/8] powerpc/fsl-booke: Add initial T4240QDS board support Kumar Gala
2013-03-12 21:15 ` [PATCH 6/8] powerpc/fsl-booke: Add initial T4240QDS board device Kumar Gala
2013-03-06 0:15 ` [PATCH 5/8] powerpc/fsl-booke: Add initial silicon device tree for Scott Wood
2013-03-07 17:09 ` Kumar Gala
2013-03-07 17:47 ` Scott Wood [this message]
2013-03-07 19:53 ` Kumar Gala
2013-03-06 11:02 ` Roy Zang
2013-03-12 21:15 ` [PATCH 3/8] powerpc/fsl-booke: Support detection of page sizes on Kumar Gala
2013-03-12 21:15 ` [PATCH 2/8] powerpc/85xx: Add support for FSL PCIe controller v3.0 Kumar Gala
2013-03-12 21:14 ` [PATCH 1/8] powerpc/85xx: Added SEC-5.0 device tree Kumar Gala
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