Subject: Re: [PATCH V4] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx

From: Scott Wood <[email-masked]>
Date: Fri, 8 Mar 2013 18:49:13 -0600

On 03/08/2013 02:01:46 AM, Jia Hongtao-B38951 wrote:
>=20
>=20
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Friday, March 08, 2013 12:38 AM
> > To: Jia Hongtao-B38951
> > Cc: David Laight; Wood Scott-B07421; [email-masked];
> > Stuart Yoder
> > Subject: Re: [PATCH V4] powerpc/85xx: Add machine check handler to =20
> fix
> > PCIe erratum on mpc85xx
> >
> > On 03/07/2013 02:06:05 AM, Jia Hongtao-B38951 wrote:
> > > Here is the ideas from Scott:
> > > "
> > > > +	if (is_in_pci_mem_space(addr)) {
> > > > +		inst =3D *(unsigned int *)regs->nip;
> > >
> > > Be careful about taking a fault here.  A simple TLB miss should be
> > > safe given that we shouldn't be accessing PCIe in the middle of
> > > exception code, but what if the mapping has gone away (e.g. a
> > > userspace driver had its code munmap()ed or swapped out)?  What if
> > > permissions allow execute but not read (not sure if Linux will =20
> allow
> > > this, but the hardware does)?
> > >
> > > What if it happened in a KVM guest?  You can't access guest =20
> addresses
> > > directly.
> > > "
> >
> > That means you need to be careful about how you read the =20
> instruction, not
> > that you shouldn't do it at all.
> >
> > -Scott
>=20
> I agree.
>=20
> Do you have a more secure way to get the instruction?
> Or what should be done to avoid permission break issue?

probe_kernel_address() should take care of userspace issues.  As for =20
KVM, if you see MSR_GS set, bail out and don't apply the workaround.  =20
Let KVM/QEMU deal with it as it wishes (e.g. reflect to the guest and =20
let its machine check handler do the skipping).  On PR-mode KVM (e.g. =20
on e500v2-based chips) there is no MSR_GS and it just looks like =20
userspace code -- for now just pretend it is user mode.

-Scott=