* [PATCH 0/2] powerpc: split the match emulation into two parts
@ 2013-07-16 11:57 Kevin Hao
2013-07-16 11:57 ` [PATCH 1/2] powerpc: split the math " Kevin Hao
2013-07-16 11:57 ` [PATCH 2/2] powerpc/mpc85xx: only emulate the unimplemented FP instructions on corenet64 Kevin Hao
0 siblings, 2 replies; 5+ messages in thread
From: Kevin Hao @ 2013-07-16 11:57 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Scott Wood; +Cc: linuxppc
On some FSL BookE cores (such as e500mc, e5500 and e6500) there does have
a FPU. But some floating point instructions are not supported by the FPU.
Introduce a kernel option so we can make the kernel only support to
emulate these unimplemented instructions. This will definitely reduce
the footprint of the kernel. And it also trim down the kernel build time
a little as predicted by Scott.
Before the patch:
Name Size
.text 00618948
After the patch:
Name Size
.text 00605328
The kernel build time(I have reboot the build server before each kernel build)
Before the patch:
real 2m29.653s
user 10m21.776s
sys 0m32.832s
After the patch:
real 2m27.767s
user 10m11.808s
sys 0m32.717s
Kevin Hao (2):
powerpc: split the math emulation into two parts
powerpc/mpc85xx: only emulate the unimplemented FP instructions on
corenet64
arch/powerpc/Kconfig | 20 ++++++++++++++++++++
arch/powerpc/configs/corenet64_smp_defconfig | 1 +
arch/powerpc/math-emu/Makefile | 24 ++++++++++++------------
arch/powerpc/math-emu/math.c | 20 ++++++++++++++------
4 files changed, 47 insertions(+), 18 deletions(-)
--
1.8.1.4
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 1/2] powerpc: split the math emulation into two parts 2013-07-16 11:57 [PATCH 0/2] powerpc: split the match emulation into two parts Kevin Hao @ 2013-07-16 11:57 ` Kevin Hao 2013-07-22 14:36 ` Kumar Gala 2013-07-16 11:57 ` [PATCH 2/2] powerpc/mpc85xx: only emulate the unimplemented FP instructions on corenet64 Kevin Hao 1 sibling, 1 reply; 5+ messages in thread From: Kevin Hao @ 2013-07-16 11:57 UTC (permalink / raw) To: Benjamin Herrenschmidt, Scott Wood; +Cc: linuxppc For some SoC (such as the FSL BookE) even though there does have a hardware FPU, but not all floating point instructions are implemented. Unfortunately some versions of gcc do use these unimplemented instructions. Then we have to enable the math emulation to workaround this issue. It seems a little redundant to have the support to emulate all the floating point instructions in this case. So split the math emulation into two parts. One is for the SoC which doesn't have FPU at all and the other for the SoC which does have the hardware FPU and only need some special floating point instructions to be emulated. Signed-off-by: Kevin Hao <haokexin@gmail•com> --- arch/powerpc/Kconfig | 20 ++++++++++++++++++++ arch/powerpc/math-emu/Makefile | 24 ++++++++++++------------ arch/powerpc/math-emu/math.c | 20 ++++++++++++++------ 3 files changed, 46 insertions(+), 18 deletions(-) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 3bf72cd..7205989 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -312,6 +312,26 @@ config MATH_EMULATION such as fsqrt on cores that do have an FPU but do not implement them (such as Freescale BookE). +choice + prompt "Math emulation options" + default MATH_EMULATION_FULL + depends on MATH_EMULATION + +config MATH_EMULATION_FULL + bool "Emulate all the floating point instructions" + ---help--- + Select this option will enable the kernel to support to emulate + all the floating point instructions. If your SoC doesn't have + a FPU, you should select this. + +config MATH_EMULATION_HW_UNIMPLEMENTED + bool "Just emulate the FPU unimplemented instructions" + ---help--- + Select this if you know there does have a hardware FPU on your + SoC, but some floating point instructions are not implemented by that. + +endchoice + config PPC_TRANSACTIONAL_MEM bool "Transactional Memory support for POWERPC" depends on PPC_BOOK3S_64 diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile index 8d035d2..1b46ab4 100644 --- a/arch/powerpc/math-emu/Makefile +++ b/arch/powerpc/math-emu/Makefile @@ -1,15 +1,15 @@ - -obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \ - fctiw.o fctiwz.o fdiv.o fdivs.o \ - fmadd.o fmadds.o fmsub.o fmsubs.o \ - fmul.o fmuls.o fnabs.o fneg.o \ - fnmadd.o fnmadds.o fnmsub.o fnmsubs.o \ - fres.o fre.o frsp.o fsel.o lfs.o \ - frsqrte.o frsqrtes.o \ - fsqrt.o fsqrts.o fsub.o fsubs.o \ - mcrfs.o mffs.o mtfsb0.o mtfsb1.o \ - mtfsf.o mtfsfi.o stfiwx.o stfs.o \ - math.o fmr.o lfd.o stfd.o +math-emu-common-objs = math.o fre.o fsqrt.o fsqrts.o frsqrtes.o mtfsf.o mtfsfi.o +obj-$(CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED) += $(math-emu-common-objs) +obj-$(CONFIG_MATH_EMULATION_FULL) += $(math-emu-common-objs) fabs.o fadd.o \ + fadds.o fcmpo.o fcmpu.o fctiw.o \ + fctiwz.o fdiv.o fdivs.o fmadd.o \ + fmadds.o fmsub.o fmsubs.o fmul.o \ + fmuls.o fnabs.o fneg.o fnmadd.o \ + fnmadds.o fnmsub.o fnmsubs.o fres.o \ + frsp.o fsel.o lfs.o frsqrte.o fsub.o \ + fsubs.o mcrfs.o mffs.o mtfsb0.o \ + mtfsb1.o stfiwx.o stfs.o math.o \ + fmr.o lfd.o stfd.o obj-$(CONFIG_SPE) += math_efp.o diff --git a/arch/powerpc/math-emu/math.c b/arch/powerpc/math-emu/math.c index d1ebac7..bc90162 100644 --- a/arch/powerpc/math-emu/math.c +++ b/arch/powerpc/math-emu/math.c @@ -14,6 +14,20 @@ #define FLOATFUNC(x) extern int x(void *, void *, void *, void *) +/* The instructions list which may be not implemented by a hardware FPU */ +FLOATFUNC(fre); +FLOATFUNC(frsqrtes); +FLOATFUNC(fsqrt); +FLOATFUNC(fsqrts); +FLOATFUNC(mtfsf); +FLOATFUNC(mtfsfi); + +#ifdef CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED +#undef FLOATFUNC(x) +#define FLOATFUNC(x) static inline int x(void *op1, void *op2, void *op3, \ + void *op4) { } +#endif + FLOATFUNC(fadd); FLOATFUNC(fadds); FLOATFUNC(fdiv); @@ -43,8 +57,6 @@ FLOATFUNC(mcrfs); FLOATFUNC(mffs); FLOATFUNC(mtfsb0); FLOATFUNC(mtfsb1); -FLOATFUNC(mtfsf); -FLOATFUNC(mtfsfi); FLOATFUNC(lfd); FLOATFUNC(lfs); @@ -59,13 +71,9 @@ FLOATFUNC(fnabs); FLOATFUNC(fneg); /* Optional */ -FLOATFUNC(fre); FLOATFUNC(fres); FLOATFUNC(frsqrte); -FLOATFUNC(frsqrtes); FLOATFUNC(fsel); -FLOATFUNC(fsqrt); -FLOATFUNC(fsqrts); #define OP31 0x1f /* 31 */ -- 1.8.1.4 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] powerpc: split the math emulation into two parts 2013-07-16 11:57 ` [PATCH 1/2] powerpc: split the math " Kevin Hao @ 2013-07-22 14:36 ` Kumar Gala 2013-07-22 17:25 ` Scott Wood 0 siblings, 1 reply; 5+ messages in thread From: Kumar Gala @ 2013-07-22 14:36 UTC (permalink / raw) To: Kevin Hao; +Cc: Scott Wood, linuxppc On Jul 16, 2013, at 6:57 AM, Kevin Hao wrote: > For some SoC (such as the FSL BookE) even though there does have > a hardware FPU, but not all floating point instructions are > implemented. Unfortunately some versions of gcc do use these > unimplemented instructions. Then we have to enable the math emulation > to workaround this issue. It seems a little redundant to have the > support to emulate all the floating point instructions in this case. > So split the math emulation into two parts. One is for the SoC which > doesn't have FPU at all and the other for the SoC which does have the > hardware FPU and only need some special floating point instructions to > be emulated. >=20 > Signed-off-by: Kevin Hao <haokexin@gmail•com> > --- > arch/powerpc/Kconfig | 20 ++++++++++++++++++++ > arch/powerpc/math-emu/Makefile | 24 ++++++++++++------------ > arch/powerpc/math-emu/math.c | 20 ++++++++++++++------ > 3 files changed, 46 insertions(+), 18 deletions(-) why make the split, what harm is there in just turning on the full = emulation code to handle the unimplemented cases? who says what some other implementation doesn't need something that you = have in CONFIG_MATH_EMULATION_FULL? Is the kernel code size really an issue? - k= ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] powerpc: split the math emulation into two parts 2013-07-22 14:36 ` Kumar Gala @ 2013-07-22 17:25 ` Scott Wood 0 siblings, 0 replies; 5+ messages in thread From: Scott Wood @ 2013-07-22 17:25 UTC (permalink / raw) To: Kumar Gala; +Cc: Kevin Hao, linuxppc On 07/22/2013 09:36:05 AM, Kumar Gala wrote: >=20 > On Jul 16, 2013, at 6:57 AM, Kevin Hao wrote: >=20 > > For some SoC (such as the FSL BookE) even though there does have > > a hardware FPU, but not all floating point instructions are > > implemented. Unfortunately some versions of gcc do use these > > unimplemented instructions. Then we have to enable the math =20 > emulation > > to workaround this issue. It seems a little redundant to have the > > support to emulate all the floating point instructions in this case. > > So split the math emulation into two parts. One is for the SoC which > > doesn't have FPU at all and the other for the SoC which does have =20 > the > > hardware FPU and only need some special floating point instructions =20 > to > > be emulated. > > > > Signed-off-by: Kevin Hao <haokexin@gmail•com> > > --- > > arch/powerpc/Kconfig | 20 ++++++++++++++++++++ > > arch/powerpc/math-emu/Makefile | 24 ++++++++++++------------ > > arch/powerpc/math-emu/math.c | 20 ++++++++++++++------ > > 3 files changed, 46 insertions(+), 18 deletions(-) >=20 > why make the split, what harm is there in just turning on the full =20 > emulation code to handle the unimplemented cases? My main motivation in requesting it was to contain the increase in =20 build time -- math-emu always stuck out to me as something that took a =20 noticeable amount of time to build. It also reduces the increase in =20 kernel image size. > who says what some other implementation doesn't need something that =20 > you have in CONFIG_MATH_EMULATION_FULL? The point is to include any instructions that are known to be missing =20 in any chip's FPU (excluding chips that don't have an FPU at all). If =20 it is discovered that some chip is missing an instruction that we =20 didn't account for, then we'd move that instruction from one list to =20 the other. > Is the kernel code size really an issue? It can be when you're storing it on flash -- especially when the growth =20 is out of control because of the need to justify pruning low-hanging =20 fruit such as this. -Scott= ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] powerpc/mpc85xx: only emulate the unimplemented FP instructions on corenet64 2013-07-16 11:57 [PATCH 0/2] powerpc: split the match emulation into two parts Kevin Hao 2013-07-16 11:57 ` [PATCH 1/2] powerpc: split the math " Kevin Hao @ 2013-07-16 11:57 ` Kevin Hao 1 sibling, 0 replies; 5+ messages in thread From: Kevin Hao @ 2013-07-16 11:57 UTC (permalink / raw) To: Benjamin Herrenschmidt, Scott Wood; +Cc: linuxppc We have split the math emulation into two parts. This makes it possible to just emulate the unimplemented floating point instructions on these boards. Signed-off-by: Kevin Hao <haokexin@gmail•com> --- arch/powerpc/configs/corenet64_smp_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig index b5408dc..39843ef 100644 --- a/arch/powerpc/configs/corenet64_smp_defconfig +++ b/arch/powerpc/configs/corenet64_smp_defconfig @@ -28,6 +28,7 @@ CONFIG_T4240_QDS=y # CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set CONFIG_BINFMT_MISC=m CONFIG_MATH_EMULATION=y +CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED=y CONFIG_FSL_IFC=y CONFIG_PCIEPORTBUS=y CONFIG_PCI_MSI=y -- 1.8.1.4 ^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2013-07-22 17:25 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-07-16 11:57 [PATCH 0/2] powerpc: split the match emulation into two parts Kevin Hao 2013-07-16 11:57 ` [PATCH 1/2] powerpc: split the math " Kevin Hao 2013-07-22 14:36 ` Kumar Gala 2013-07-22 17:25 ` Scott Wood 2013-07-16 11:57 ` [PATCH 2/2] powerpc/mpc85xx: only emulate the unimplemented FP instructions on corenet64 Kevin Hao
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