From: Scott Wood <scottwood@freescale•com>
To: Aaron Sierra <asierra@xes-inc•com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation•org>,
linuxppc-dev@lists•ozlabs.org,
Prabhakar Kushwaha <prabhakar@freescale•com>,
Arnd Bergmann <arnd@arndb•de>
Subject: Re: [PATCH 2/2] fsl_ifc: Support all 8 IFC chip selects
Date: Tue, 19 Aug 2014 19:08:05 -0500 [thread overview]
Message-ID: <1408493285.4058.55.camel@snotra.buserror.net> (raw)
In-Reply-To: <1234993482.57039.1408136876321.JavaMail.zimbra@xes-inc.com>
On Fri, 2014-08-15 at 16:07 -0500, Aaron Sierra wrote:
> Freescale's QorIQ T Series processors support 8 IFC chip selects
> within a memory map backward compatible with previous P Series
> processors which supported only 4 chip selects.
>
> Signed-off-by: Aaron Sierra <asierra@xes-inc•com>
> ---
> include/linux/fsl_ifc.h | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/include/linux/fsl_ifc.h b/include/linux/fsl_ifc.h
> index 84d60cb..62762ff 100644
> --- a/include/linux/fsl_ifc.h
> +++ b/include/linux/fsl_ifc.h
> @@ -29,7 +29,7 @@
> #include <linux/of_platform.h>
> #include <linux/interrupt.h>
>
> -#define FSL_IFC_BANK_COUNT 4
> +#define FSL_IFC_BANK_COUNT 8
First please modify fsl_ifc_nand.c to limit itself to the number of
banks it dynamically determines are present based on the IFC version.
-Scott
next prev parent reply other threads:[~2014-08-20 0:08 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-15 21:07 [PATCH 2/2] fsl_ifc: Support all 8 IFC chip selects Aaron Sierra
2014-08-20 0:08 ` Scott Wood [this message]
2014-08-20 3:35 ` Prabhakar Kushwaha
2014-08-20 15:54 ` Aaron Sierra
2014-08-20 23:21 ` Scott Wood
2014-08-22 14:37 ` Prabhakar Kushwaha
2014-08-22 17:51 ` Scott Wood
2014-08-25 6:28 ` Prabhakar Kushwaha
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