From: Scott Wood <scottwood@freescale•com>
To: Laurentiu Tudor <b10716@freescale•com>
Cc: Mihai Caraman <mihai.caraman@freescale•com>,
Laurentiu Tudor <Laurentiu.Tudor@freescale•com>,
linuxppc-dev <linuxppc-dev@lists•ozlabs.org>
Subject: Re: [PATCH 4/4] powerpc/fsl_msi: spread msi ints across different MSIRs
Date: Tue, 19 Aug 2014 19:20:32 -0500 [thread overview]
Message-ID: <1408494032.4058.61.camel@snotra.buserror.net> (raw)
In-Reply-To: <53F33413.3050009@freescale.com>
A couple nits that don't necessarily warrant a respin:
On Tue, 2014-08-19 at 14:25 +0300, Laurentiu Tudor wrote:
> Allocate msis such that each time a new
> interrupt is requested, the SRS (MSIR
> register select) to be used is allocated
> in a round-robin fashion.
> The end result is that the msi interrupts
> will be spread across distinct MSIRs with
> the main benefit that now users can set
> affinity to each msi int through the mpic
> irq backing up the MSIR register.
> This is achieved with the help of a newly
> introduced msi bitmap api that allows
> specifying the starting point when
> searching for a free msi interrupt.
Please wrap at around 60-70 columns.
> + } else {
> + off = (atomic_inc_return(&msi_data->msi_alloc_cnt) %
> + msi_data->msir_num);
> + off *= (1 << msi_data->srs_shift);
This is an unusual way to write "off <<= msi->data->srs_shift"...
-Scott
prev parent reply other threads:[~2014-08-20 0:20 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-19 11:25 [PATCH 4/4] powerpc/fsl_msi: spread msi ints across different MSIRs Laurentiu Tudor
2014-08-20 0:20 ` Scott Wood [this message]
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