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From: Michael Ellerman <mpe@ellerman•id.au>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com>
Cc: linuxppc-dev@lists•ozlabs.org,
	Michael Neuling <mikey@neuling•org>,
	paulus@samba•org
Subject: Re: [PATCH V2] powerpc/TM: Disable/Enable TM looking at the ibm, pa-features device tree entry
Date: Thu, 13 Nov 2014 16:42:27 +1100	[thread overview]
Message-ID: <1415857347.28703.8.camel@concordia> (raw)
In-Reply-To: <87d28tasfe.fsf@linux.vnet.ibm.com>

On Wed, 2014-11-12 at 11:09 +0530, Aneesh Kumar K.V wrote:
> Michael Neuling <mikey@neuling•org> writes:
> 
> > On Sun, 2014-11-02 at 20:02 +0530, Aneesh Kumar K.V wrote:
> >> Runtime disable transactional memory feature looking at pa-features
> >> device tree entry. We need to do this so that we can run a kernel
> >> built with TM config in PR mode. 
> >
> > I'm happy to turn this off but why do we need to do this in PR mode?
> > Can you explain this in the commit message.
> 
> Hmm, that commit message needs an update. I initially did the patch for
> P8 PR support and wanted a mechanism to disable TM. Alex added basic TM
> support for PR mode after that. So we can drop the PR part of the
> commit message.
> 
> Michael Ellerman,
> 
> Let me know if you want me to send an updated version with the those
> part of the commit message dropped

How about:

  powerpc: Disable CPU_FTR_TM if TM is disabled by firmware
  
  Firmware is allowed to communicate to us via the "ibm,pa-features" property
  that TM (Transactional Memory) support is disabled.
  
  Currently this doesn't happen on any platform we're aware of, but we should
  honor it anyway.


cheers

  reply	other threads:[~2014-11-13  5:42 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-02 14:32 [PATCH V2] powerpc/TM: Disable/Enable TM looking at the ibm, pa-features device tree entry Aneesh Kumar K.V
2014-11-12  0:44 ` Michael Neuling
2014-11-12  5:39   ` Aneesh Kumar K.V
2014-11-13  5:42     ` Michael Ellerman [this message]
2014-11-13  6:19       ` Aneesh Kumar K.V

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