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From: Chenhui Zhao <chenhui.zhao@freescale•com>
To: Scott Wood <scottwood@freescale•com>
Cc: <b29983@freescale•com>, <b07421@freescale•com>,
	<linux-kernel@vger•kernel.org>,
	Tang Yuantian <Yuantian.Tang@freescale•com>,
	"linuxppc-dev@lists•ozlabs.org" <linuxppc-dev@lists•ozlabs.org>
Subject: Re: [PATCH 1/3] Powerpc: mpc85xx: refactor the PM operations
Date: Thu, 6 Aug 2015 13:54:26 +0800	[thread overview]
Message-ID: <1438840466.23384.2@remotesmtp.freescale.net> (raw)
In-Reply-To: <1438839985.2097.151.camel@freescale.com>



On Thu, Aug 6, 2015 at 1:46 PM, Scott Wood <scottwood@freescale•com> 
wrote:
> On Thu, 2015-08-06 at 12:20 +0800, Chenhui Zhao wrote:
>>  On Thu, Aug 6, 2015 at 10:57 AM, Scott Wood 
>> <scottwood@freescale•com>
>>  wrote:
>>  > On Wed, 2015-08-05 at 18:11 +0800, Chenhui Zhao wrote:
>>  > >  On Tue, Aug 4, 2015 at 4:26 AM, Scott Wood 
>> <scottwood@freescale•com>
>>  > >  wrote:
>>  > >  > On Mon, 2015-08-03 at 19:32 +0800, Chenhui Zhao wrote:
>>  > >  > >  >
>>  > >  >
>>  > >  > >  On Sat, Aug 1, 2015 at 7:59 AM, Scott Wood
>>  > > <scottwood@freescale•com>
>>  > >  > >  wrote:
>>  > >  >
>>  > >  > >  >
>>  > >  > >  > Could you explain irq_mask()?  Why would there still be 
>> IRQs
>>  > >  > > destined
>>  > >  > >  > for
>>  > >  > >  > this CPU at this point?
>>  > >  > >
>>  > >  > >  This function just masks irq by setting the registers in 
>> RCPM
>>  > > (for
>>  > >  > >  example, RCPM_CPMIMR, RCPM_CPMCIMR). Actually, all irqs to
>>  > > this CPU
>>  > >  > >  have been migrated to other CPUs.
>>  > >  >
>>  > >  > So why do we need to set those bits in RCPM?  Is it just 
>> caution?
>>  > >
>>  > >  Setting these bits can mask interrupts signalled to RCPM from 
>> MPIC
>>  > > as a
>>  > >  means of
>>  > >  waking up from a lower power state. So, cores will not be 
>> waked up
>>  > >  unexpectedly.
>>  >
>>  > Why would the MPIC be signalling those interrupts if they've been
>>  > masked at
>>  > the MPIC?
>>  >
>>  > -Scott
>>  >
>> 
>>  The interrupts to RCPM from MPIC are IRQ, Machine Check, NMI and
>>  Critical interrupts. Some of them didn't be masked in MPIC.
> 
> What interrupt could actually happen to a sleeping cpu that this 
> protects
> against?
> 
> -Scott

Not sure. Maybe spurious interrupts or hardware exceptions. However, 
setting them make sure dead cpus can not be waked up unexpectedly.

-Chenhui

  reply	other threads:[~2015-08-06  5:54 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1438334444-31919-1-git-send-email-b29983@freescale.com>
     [not found] ` <1438334444-31919-2-git-send-email-b29983@freescale.com>
     [not found]   ` <1438388082.19345.85.camel@freescale.com>
     [not found]     ` <1438602724.7515.3@remotesmtp.freescale.net>
2015-08-03 21:18       ` [PATCH 2/3] PowerPC/mpc85xx: Add hotplug support on E5500 and E500MC cores Scott Wood
2015-08-05 10:39         ` Chenhui Zhao
     [not found] ` <1438387178.19345.77.camel@freescale.com>
     [not found]   ` <1438601578.7515.2@remotesmtp.freescale.net>
     [not found]     ` <1438633568.2097.35.camel@freescale.com>
     [not found]       ` <1438769477.21522.0@remotesmtp.freescale.net>
     [not found]         ` <1438829848.2097.129.camel@freescale.com>
2015-08-06  4:20           ` [PATCH 1/3] Powerpc: mpc85xx: refactor the PM operations Chenhui Zhao
2015-08-06  5:46             ` Scott Wood
2015-08-06  5:54               ` Chenhui Zhao [this message]
2015-08-06 18:02                 ` Scott Wood
2015-08-07  3:19                   ` Chenhui Zhao
2015-08-08  0:13                     ` Scott Wood
     [not found] ` <1438334444-31919-3-git-send-email-b29983@freescale.com>
     [not found]   ` <1438388531.19345.88.camel@freescale.com>
     [not found]     ` <1438772906.21522.2@remotesmtp.freescale.net>
     [not found]       ` <1438831004.2097.146.camel@freescale.com>
2015-08-06  4:32         ` [PATCH 3/3] PowerPC/mpc85xx: Add hotplug support on E6500 cores Chenhui Zhao
2015-08-06  5:44           ` Scott Wood

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