Subject: Re: [PATCH 2/2] powerpc: Add POWER9 cputable entry

From: Michael Neuling <[email-masked]>
Date: Wed, 17 Feb 2016 20:10:58 +1100

> > +_GLOBAL(__setup_cpu_power9)
> > +	mflr	r11
> > +	bl	__init_FSCR
> > +	bl	__init_PMU
> Just to keep in mind, I am not sure whether
> powerisa 3.0 support MMCRS spr, so we
> will need a feature check in __init_PMU()
> for power9.

Yeah, I'm not expecting this to work.

I'm trying to lay down a common base we can start working on.  There
are lots of people working a bunch different bases.  I want to avoid
that and we can do that by upstreaming.

> > +	bl	__init_hvmode_206
> > +	mtlr	r11
> > +	beqlr
> > +	li	r0,0
> > +	mtspr	SPRN_LPID,r0
> > +	mfspr	r3,SPRN_LPCR
> > +	ori	r3, r3, LPCR_PECEDH
> > +	bl	__init_LPCR
> > +	bl	__init_HFSCR
> > +	bl	__init_tlb_power9
> > +	bl	__init_PMU_HV
>=20
> Again, need to check whether powerisa 3.0 support MMCRH spr
> which is used in __init_PMU_HV()

Same here.
> > +	{	/*  Hacked up Power9 */

/me reviews his own patch...

Oops

> > +		.pvr_mask		=3D 0xffff0000,
> > +		.pvr_value		=3D 0x004e0000,
> > +		.cpu_name		=3D "POWER9 (raw)",
> > +		.cpu_features		=3D CPU_FTRS_POWER9,
> > +		.cpu_user_features	=3D COMMON_USER_POWER9,
> > +		.cpu_user_features2	=3D COMMON_USER2_POWER9,
> > +		.mmu_features		=3D MMU_FTRS_POWER9,
> > +		.icache_bsize		=3D 128,
> > +		.dcache_bsize		=3D 128,
> > +		.num_pmcs		=3D 6,
> > +		.pmc_type		=3D PPC_PMC_IBM,
> > +		.oprofile_cpu_type	=3D "ppc64/power8",
>
> This should be ppc64/power9. We use "oprofile_cpu_type" in PMU init.

Yep, we can fix that up when we post PMU patches, but if I repost I'll
change so it doesn't match with old one.

Mikey