From: Benjamin Herrenschmidt <benh@au1•ibm.com>
To: Bjorn Helgaas <helgaas@kernel•org>,
Gavin Shan <gwshan@linux•vnet.ibm.com>
Cc: bhelgaas@google•com, linux-pci@vger•kernel.org,
clsoto@us•ibm.com, linuxppc-dev@lists•ozlabs.org
Subject: Re: [PATCH] PCI: Add parameter @mmio_force_on to pci_update_resource()
Date: Wed, 28 Sep 2016 07:45:32 +1000 [thread overview]
Message-ID: <1475012732.2857.293.camel@au1.ibm.com> (raw)
In-Reply-To: <20160927192003.GA14642@localhost>
On Tue, 2016-09-27 at 14:20 -0500, Bjorn Helgaas wrote:
> On Mon, Sep 19, 2016 at 09:53:30AM +1000, Gavin Shan wrote:
> > In pci_update_resource(), the PCI device's memory decoding (0x2 in
> > PCI_COMMAND) is disabled when 64-bits memory BAR is updated if the
> > PCI device's memory space wasn't asked to be always on by @pdev->
> > mmio_always_on. The PF's memory decoding might be disabled when
> > updating its IOV BARs in the following path. Actually, the PF's
> > memory decoding shouldn't be disabled in this scenario as the PF
> > has been started to provide services:
>
> The reason we disable memory decoding while updating a 64-bit BAR is
> because we can't do the update atomically, and a half-updated BAR might
> conflict with other devices.
>
> You need to explain what is special about these SR-IOV BARs that makes it
> safe to update them non-atomically while decoding is enabled.
The IOV BAR won't decode until SR-IOV is enabled right ? Gavin, I don't
think we update it "live", so it should be safe...
Cheers,
Ben.
next prev parent reply other threads:[~2016-09-27 21:45 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-18 23:53 [PATCH] PCI: Add parameter @mmio_force_on to pci_update_resource() Gavin Shan
2016-09-26 23:43 ` Gavin Shan
2016-09-27 19:20 ` Bjorn Helgaas
2016-09-27 21:45 ` Benjamin Herrenschmidt [this message]
2016-09-27 23:37 ` Gavin Shan
2016-09-28 0:06 ` Benjamin Herrenschmidt
2016-09-28 1:14 ` Gavin Shan
2016-09-29 23:45 ` Gavin Shan
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