From: Benjamin Herrenschmidt <benh@kernel•crashing.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com>,
paulus@samba•org, mpe@ellerman•id.au
Cc: linuxppc-dev@lists•ozlabs.org
Subject: Re: [PATCH 1/3] powerpc/mm/radix: Update pte update sequence for pte clear case
Date: Thu, 09 Feb 2017 15:15:29 +1100 [thread overview]
Message-ID: <1486613729.3401.15.camel@kernel.crashing.org> (raw)
In-Reply-To: <1486612188.3401.14.camel@kernel.crashing.org>
On Thu, 2017-02-09 at 14:49 +1100, Benjamin Herrenschmidt wrote:
> On Thu, 2017-02-09 at 08:28 +0530, Aneesh Kumar K.V wrote:
> > In the kernel we do follow the below sequence in different code
> > paths.
> > pte = ptep_get_clear(ptep)
> > ....
> > set_pte_at(ptep, pte)
> >
> > We do that for mremap, autonuma protection update and softdirty
> > clearing. This
> > implies our optimization to skip a tlb flush when clearing a pte
> > update is
> > not valid, because for DD1 system that followup set_pte_at will be
> > done witout
> > doing the required tlbflush. Fix that by always doing the dd1 style
> > pte update
> > irrespective of new_pte value. In a later patch we will optimize
> > the application
> > exit case.
>
> What about my change to set_pte_at() ? We seem to be overwriting
> valid PTEs,
> shouldn't we deal with that ?
So the HW guys confirmed that the TLB will never cache a valid entry
that has all permissions clear. That leaves the THP write problem
though.
Cheers,
Ben.
> Cheers,
> Ben.
>
> > Signed-off-by: Benjamin Herrenschmidt <benh@kernel•crashing.org>
> > > Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux•vnet.ibm.com>
> >
> > ---
> > arch/powerpc/include/asm/book3s/64/radix.h | 12 +++---------
> > 1 file changed, 3 insertions(+), 9 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/book3s/64/radix.h
> > b/arch/powerpc/include/asm/book3s/64/radix.h
> > index b4d1302387a3..70a3cdcdbe47 100644
> > --- a/arch/powerpc/include/asm/book3s/64/radix.h
> > +++ b/arch/powerpc/include/asm/book3s/64/radix.h
> > @@ -144,16 +144,10 @@ static inline unsigned long
> > radix__pte_update(struct mm_struct *mm,
> > > * new value of pte
> > > */
> > > new_pte = (old_pte | set) & ~clr;
> > > - /*
> > > - * If we are trying to clear the pte, we can
> > > skip
> > > - * the below sequence and batch the tlb flush.
> > > The
> > > - * tlb flush batching is done by mmu gather code
> > > - */
> > > - if (new_pte) {
> > > - asm volatile("ptesync" : : : "memory");
> > > - radix__flush_tlb_pte_p9_dd1(old_pte, mm,
> > > addr);
> > > + asm volatile("ptesync" : : : "memory");
> > > + radix__flush_tlb_pte_p9_dd1(old_pte, mm, addr);
> > > + if (new_pte)
> > > __radix_pte_update(ptep, 0, new_pte);
> > > - }
> > > } else
> > > old_pte = __radix_pte_update(ptep, clr, set);
> > > asm volatile("ptesync" : : : "memory");
next prev parent reply other threads:[~2017-02-09 4:15 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-09 2:58 [PATCH 1/3] powerpc/mm/radix: Update pte update sequence for pte clear case Aneesh Kumar K.V
2017-02-09 2:58 ` [PATCH 2/3] powerpc/mm/radix: Use ptep_get_and_clear_full when clearing pte for full mm Aneesh Kumar K.V
2017-02-14 4:17 ` Michael Neuling
2017-02-09 2:58 ` [PATCH 3/3] powerpc/mm/radix: Skip ptesync in pte update helpers Aneesh Kumar K.V
2017-02-14 4:17 ` Michael Neuling
2017-02-09 3:49 ` [PATCH 1/3] powerpc/mm/radix: Update pte update sequence for pte clear case Benjamin Herrenschmidt
2017-02-09 4:15 ` Benjamin Herrenschmidt [this message]
2017-02-09 4:34 ` Aneesh Kumar K.V
2017-02-14 4:17 ` Michael Neuling
2017-02-16 5:59 ` [1/3] " Michael Ellerman
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