From: Michael Neuling <mikey@neuling•org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com>,
benh@kernel•crashing.org, paulus@samba•org, mpe@ellerman•id.au
Cc: linuxppc-dev@lists•ozlabs.org
Subject: Re: [PATCH 1/3] powerpc/mm/radix: Update pte update sequence for pte clear case
Date: Tue, 14 Feb 2017 15:17:16 +1100 [thread overview]
Message-ID: <1487045836.21048.25.camel@neuling.org> (raw)
In-Reply-To: <1486609101-5231-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On Thu, 2017-02-09 at 08:28 +0530, Aneesh Kumar K.V wrote:
> In the kernel we do follow the below sequence in different code paths.
> pte =3D ptep_get_clear(ptep)
> ....
> set_pte_at(ptep, pte)
>=20
> We do that for mremap, autonuma protection update and softdirty clearing.=
This
> implies our optimization to skip a tlb flush when clearing a pte update i=
s
> not valid, because for DD1 system that followup set_pte_at will be done w=
itout
> doing the required tlbflush. Fix that by always doing the dd1 style pte u=
pdate
> irrespective of new_pte value. In a later patch we will optimize the
> application
> exit case.
>=20
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel•crashing.org>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux•vnet.ibm.com>
Tested-by: Michael Neuling <mikey@neuling•org>
> ---
> =C2=A0arch/powerpc/include/asm/book3s/64/radix.h | 12 +++---------
> =C2=A01 file changed, 3 insertions(+), 9 deletions(-)
>=20
> diff --git a/arch/powerpc/include/asm/book3s/64/radix.h
> b/arch/powerpc/include/asm/book3s/64/radix.h
> index b4d1302387a3..70a3cdcdbe47 100644
> --- a/arch/powerpc/include/asm/book3s/64/radix.h
> +++ b/arch/powerpc/include/asm/book3s/64/radix.h
> @@ -144,16 +144,10 @@ static inline unsigned long radix__pte_update(struc=
t
> mm_struct *mm,
> =C2=A0 =C2=A0* new value of pte
> =C2=A0 =C2=A0*/
> =C2=A0 new_pte =3D (old_pte | set) & ~clr;
> - /*
> - =C2=A0* If we are trying to clear the pte, we can skip
> - =C2=A0* the below sequence and batch the tlb flush. The
> - =C2=A0* tlb flush batching is done by mmu gather code
> - =C2=A0*/
> - if (new_pte) {
> - asm volatile("ptesync" : : : "memory");
> - radix__flush_tlb_pte_p9_dd1(old_pte, mm, addr);
> + asm volatile("ptesync" : : : "memory");
> + radix__flush_tlb_pte_p9_dd1(old_pte, mm, addr);
> + if (new_pte)
> =C2=A0 __radix_pte_update(ptep, 0, new_pte);
> - }
> =C2=A0 } else
> =C2=A0 old_pte =3D __radix_pte_update(ptep, clr, set);
> =C2=A0 asm volatile("ptesync" : : : "memory");
next prev parent reply other threads:[~2017-02-14 4:17 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-09 2:58 [PATCH 1/3] powerpc/mm/radix: Update pte update sequence for pte clear case Aneesh Kumar K.V
2017-02-09 2:58 ` [PATCH 2/3] powerpc/mm/radix: Use ptep_get_and_clear_full when clearing pte for full mm Aneesh Kumar K.V
2017-02-14 4:17 ` Michael Neuling
2017-02-09 2:58 ` [PATCH 3/3] powerpc/mm/radix: Skip ptesync in pte update helpers Aneesh Kumar K.V
2017-02-14 4:17 ` Michael Neuling
2017-02-09 3:49 ` [PATCH 1/3] powerpc/mm/radix: Update pte update sequence for pte clear case Benjamin Herrenschmidt
2017-02-09 4:15 ` Benjamin Herrenschmidt
2017-02-09 4:34 ` Aneesh Kumar K.V
2017-02-14 4:17 ` Michael Neuling [this message]
2017-02-16 5:59 ` [1/3] " Michael Ellerman
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