Subject: Re: bootstrap stuffs

From: Paul Mackerras <[email-masked]>
Date: Tue, 16 Feb 1999 11:02:59 +1100

David Edelsohn <[email-masked]> wrote:

> 	"isync" is used to discard instruction pre-fetch and ensure that
> all previous instructions have occurred.  isync is not necessary for your
> situation either.
> 
> 	As Gabriel correctly explained, a "sync" instruction may be
> necessary before interrupts are enabled if some off-chip operation, like

Sync and isync turn out to be needed on some revs of some chips
(particularly the 601) around rfi and mtmsr instructions.

(In fact the 601 seems to have another weird bug - in the hash_page
routine in head.S, the location of the rfi instruction w.r.t. cache
lines appears to be critical on the 601; if it's wrong, you get a
machine check on the rfi instruction.  At one stage I found that with
2, 3, 6, or 7 nops added, it would work; with 0, 1, 4 or 5 nops added
it wouldn't. :-)

Paul.

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