From: andrew may <acmay@acmay•homeip.net>
To: linuxppc-embedded@lists•linuxppc.org
Cc: Armin <akuster@pacbell•net>
Subject: PPC405gp enet Soft Reset
Date: Thu, 7 Feb 2002 19:17:41 -0800 [thread overview]
Message-ID: <20020207191741.A26185@ecam.san.rr.com> (raw)
I seem to be having a problem with the soft reset of EMAC
mode register when I have no ethernet connection to by phy.
After this code in init_ppc405_enet(void) the SRST bit does
not clear until after I stick in a cable.
/* Reset the EMAC */
emacp->em0mr0 = EMAC_M0_SRST;
eieio();
for (delay = 0; delay < 1000; delay++) ;
emacp->em0mr0 = emacp->em0mr0 & ~EMAC_M0_SRST;
eieio();
printk( KERN_INFO "em0mr0 %08x", emacp->em0mr0 );
This causes problems in find_phy, since phy_reg never gets set to
a value and read_mdio fails.
I have a Rev E chip, but since I always booted over the net with the
Walnut board I don't think I even tried to boot without an ethernet
connection.
Just checking to see if anyone else has noticed what their 405gp does
when it doesn't have a connection during the linux boot.
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next reply other threads:[~2002-02-08 3:17 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-02-08 3:17 andrew may [this message]
2002-02-08 10:03 ` PPC405gp enet Soft Reset Stefan Roese
2002-02-08 18:35 ` andrew may
2002-02-08 10:53 ` Armin
2002-02-08 20:01 ` andrew may
2002-02-11 11:55 ` David Müller (ELSOFT AG)
2002-02-12 0:49 ` andrew may
2002-02-13 8:37 ` 405 MII-PHY communication problem (was: Re: PPC405gp enet Soft Reset) David Müller (ELSOFT AG)
2002-02-13 15:15 ` Stefan Roese
2002-02-19 12:05 ` David Müller (ELSOFT AG)
2002-02-19 12:21 ` Stefan Roese
2002-02-22 0:56 ` andrew may
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