Subject: Re: More details on the telnet with CONFIG_PIN_TLB problems

From: David Gibson <[email-masked]>
Date: Thu, 6 Jun 2002 11:42:06 +1000

On Tue, Jun 04, 2002 at 09:31:30PM +0200, Benjamin Herrenschmidt wrote:
>
> >I've committed a patch to use 'sync' before changing the PID (to flush
> >any loads/stores through the MMU before we change the context) and
> >'isync' afterwards to flush the shadow TLBs.  I'm guessing that isync
> >flushes both shadow TLBs, not just the ITLB, and that the missing
> >infomation is a documentation error.  I've sent some email to the IBM
> >PPC support people to check.
>
> Sounds good. In my local tree, I also replaced the icbi's in
> flush_dcache_icache & flush_instruction_cache with iccci's to
> make sure we don't have stale aliases. I haven't yet checked
> glibc for this though.

I heard back from the PPCSUPP people, and apparently isync (or any
context sychronising instruction) does the right thing and flushes the
shadow DTLB.

flush_instruction_cache() is already an iccci on 4xx (iccci flushes
the entire ICU).  flush_dcache_icache() should be fixed though.  We
could either replace the entire icache flushing loop with a single
iccci, or we could replace each icbi with two icbis, on the address
and the address XORed with 0x00001000 (which is the only possible
alias with 4kb pages).

--
David Gibson			| For every complex problem there is a
[email-masked]	| solution which is simple, neat and
				| wrong.  -- H.L. Mencken
http://www.ozlabs.org/people/dgibson

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