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From: David Gibson <david@gibson•dropbear.id.au>
To: Todd Poynor <tpoynor@mvista•com>
Cc: linuxppc-embedded@lists•linuxppc.org
Subject: Re: very minor 405GP and 405GPr PCI difference
Date: Tue, 8 Oct 2002 14:17:58 +1000	[thread overview]
Message-ID: <20021008041758.GG32555@zax> (raw)
In-Reply-To: <3D9DDEE9.5070909@mvista.com>


On Fri, Oct 04, 2002 at 11:33:13AM -0700, Todd Poynor wrote:
>
> David Gibson wrote:
>
> >+	/* Now configure the PCI->PLB windows, we only use PTM1 */
> >+	out_le32((void *) &(pcip->ptm1ms), 0x00000000); /* first disable */
> >+	out_le32((void *) &(pcip->ptm1la), 0x00000000); /* base address */
> >+	out_le32((void *) &(pcip->ptm1ms), 0x80000001); /* re-enable */
> >+	out_le32((void *) &(pcip->ptm2ms), 0x00000000); /* disable PTM2 */
> >+
> >+	/* Zero config bars */
> >+	for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
> >+		early_write_config_dword(hose, hose->first_busno,
> >+					 PCI_FUNC(hose->first_busno), bar,
> >+					 0x00000000);
> >+		early_read_config_dword(hose, hose->first_busno,
> >+					PCI_FUNC(hose->first_busno), bar,
> >+					&bar_response);
> >+		DBG("BUS %d, device %d, Function %d bar 0x%8.8x is
> >0x%8.8x\n",
> >+		    hose->first_busno, PCI_SLOT(hose->first_busno),
> >+		    PCI_FUNC(hose->first_busno), bar, bar_response);
> >+	}
>
> Only PCI_BASE_ADDRESS_1 (aka PCIL0_PTM1BAR) needs to be set since PTM2
> is disabled (Ash is already doing it this way).  My reading of the
> manual would indicate that the BAR ought to be set before PTM1 is
> enabled, but haven't seen any problems with this.

I guess that's true.  On the other hand, I wonder if there is merit in
setting the other BAR, just so that everything is in a known state.

> Could enclose the early_read_config_dword() in #ifdef DEBUG.

Yes, good idea.

> Rainier (NP4GS3) PMM1 is setup specially in the existing code, is this
> no longer needed?

Well, I don't know if it's necessary - it's not there, because I
didn't notice the difference in the Rainier code before.  Now that I
do look at it, I'm confused: it appears to be setting up both PMM0 and
PMM1 to map from the same PLB addresses, but the manual specifically
prohibits overlapping PMM ranges.

> This code is fragile and tends to break on certain platforms in ways
> that can't be explained by the available documentation.  I can help test
> the unified version on Walnut/Sycamore/Ash if needed.

Do you mean the existing code, or my proposed patch (or both).  That
would be great if you could test the code on those machines -  I don't
have a Sycamore or Ash, and I'd have to drag the Walnut out again to
test on it.

--
David Gibson			| For every complex problem there is a
david@gibson•dropbear.id.au	| solution which is simple, neat and
				| wrong.
http://www.ozlabs.org/people/dgibson

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

  reply	other threads:[~2002-10-08  4:17 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2002-09-27 12:27 very minor 405GP and 405GPr PCI difference Ralph Blach
2002-09-30  4:01 ` David Gibson
2002-10-01  5:21   ` David Gibson
2002-10-01  8:37     ` "David Müller (ELSOFT AG)"
2002-10-02  1:42       ` David Gibson
2002-10-02  4:26         ` Allen Curtis
2002-10-02  5:34           ` David Gibson
2002-10-02 17:03             ` Matt Porter
2002-10-03  1:10               ` David Gibson
2002-10-03 15:14                 ` Matt Porter
2002-10-04  2:48                   ` David Gibson
2002-10-04 18:33                     ` Todd Poynor
2002-10-08  4:17                       ` David Gibson [this message]
2002-10-08 19:39                         ` Todd Poynor
2002-10-09  2:14                           ` David Gibson
     [not found]                           ` <20021 <20021023040850.GC1198@zax>
2002-10-24 23:50                             ` Ralph Blach
2002-10-25  1:19                               ` David Gibson
2002-10-02  7:46         ` "David Müller (ELSOFT AG)"
2002-10-03  1:12           ` David Gibson
2002-10-03  8:28             ` "David Müller (ELSOFT AG)"
2002-10-06  5:23             ` Andrew May
2002-10-07  1:31               ` Matt Porter
2002-10-08  4:14                 ` David Gibson
2002-10-08  5:21                   ` Andrew May
2002-10-08 14:56                     ` Matt Porter
2002-10-08 17:31                       ` Andrew May
2002-10-08 18:20                         ` Matt Porter
2002-10-09  1:58                     ` David Gibson
2002-10-09 10:35                       ` Kenneth Johansson
2002-10-09 15:21                         ` Allen Curtis
2002-10-11 19:37                       ` Andrew May
2002-10-14  1:20                         ` David Gibson
2002-10-08  6:19                   ` Allen Curtis
2002-10-08 15:18                     ` Matt Porter
2002-10-09  2:10                     ` David Gibson
2002-10-22 21:55         ` Todd Poynor
2002-10-23  4:08           ` David Gibson
  -- strict thread matches above, loose matches on Subject: below --
2002-10-23 13:10 Ralph Blach

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