From: Brian Waite <waite@skycomputers•com>
To: linuxppc-embedded@ozlabs•org
Subject: Re: [PATCH] ppc32: 0/2 add support for Sky Computers HDPU Compute blade
Date: Thu, 17 Mar 2005 12:47:16 -0500 [thread overview]
Message-ID: <200503171247.20161.waite@skycomputers.com> (raw)
In-Reply-To: <4239C1FD.7060308@mvista.com>
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On Thursday 17 March 2005 12:44, Mark A. Greer wrote:
> Brian Waite wrote:
>
> >+#define HDPU_INTERNAL_SRAM_BASE 0xfbfc0000
> >+#define HDPU_INTERNAL_SRAM_SIZE 0x00040000
> >
> >
> I haven't gone through in detail yet but one thing I did notice was that
> you don't have the proper SRAM alignment or size. The SRAM on the
> 64[34]60 is 2MB so it must be aligned on a boundary that's a multiple of
> 2MB.
>
Mark,
Argh that is a carry over from a bad experiment in consolidating memory space.
I don't use the SRAM for anything so it will not break the code so I will provide a patch on top
of the platform patch to fix this if that works for you.
Thanks
Brian
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next prev parent reply other threads:[~2005-03-17 17:57 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-03-17 14:53 [PATCH] ppc32: 0/2 add support for Sky Computers HDPU Compute blade Brian Waite
2005-03-17 16:11 ` [PATCH] ppc32: 3/2 HDPU platform fix PCI bus 1 enumeration Brian Waite
2005-03-17 16:25 ` Eugene Surovegin
2005-03-17 16:21 ` Brian Waite
2005-03-17 17:44 ` [PATCH] ppc32: 0/2 add support for Sky Computers HDPU Compute blade Mark A. Greer
2005-03-17 17:47 ` Brian Waite [this message]
2005-03-17 23:56 ` Mark A. Greer
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