* update DataTLBMiss exception comment
@ 2005-04-19 11:52 Marcelo Tosatti
2005-04-19 16:57 ` Dan Malek
0 siblings, 1 reply; 2+ messages in thread
From: Marcelo Tosatti @ 2005-04-19 11:52 UTC (permalink / raw)
To: Dan Malek; +Cc: linux-ppc-embedded
Hi,
Since v2.6 DataTLBMiss doesnt jump to the page fault handler, it instead
loads invalid TLB which in turn causes a DataTLBError exception.
The comment on top of it haven't been update since the change.
What about this?
--- head_8xx.S.orig 2005-04-19 13:29:14.000000000 -0300
+++ head_8xx.S 2005-04-19 13:34:44.000000000 -0300
@@ -289,13 +289,11 @@
* For the MPC8xx, this is a software tablewalk to load the instruction
* TLB. It is modelled after the example in the Motorola manual. The task
* switch loads the M_TWB register with the pointer to the first level table.
- * If we discover there is no second level table (the value is zero), the
- * plan was to load that into the TLB, which causes another fault into the
- * TLB Error interrupt where we can handle such problems. However, that did
- * not work, so if we discover there is no second level table, we restore
- * registers and branch to the error exception. We have to use the MD_xxx
- * registers for the tablewalk because the equivalent MI_xxx registers
- * only perform the attribute functions.
+ * If we discover there is no second level table (value is zero) or if there
+ * is an invalid pte, we load that into the TLB, which causes another fault
+ * into the TLB Error interrupt where we can handle such problems.
+ * We have to use the MD_xxx registers for the tablewalk because the
+ * equivalent MI_xxx registers only perform the attribute functions.
*/
InstructionTLBMiss:
#ifdef CONFIG_8xx_CPU6
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: update DataTLBMiss exception comment
2005-04-19 11:52 update DataTLBMiss exception comment Marcelo Tosatti
@ 2005-04-19 16:57 ` Dan Malek
0 siblings, 0 replies; 2+ messages in thread
From: Dan Malek @ 2005-04-19 16:57 UTC (permalink / raw)
To: Marcelo Tosatti; +Cc: linux-ppc-embedded
On Apr 19, 2005, at 7:52 AM, Marcelo Tosatti wrote:
> Since v2.6 DataTLBMiss doesnt jump to the page fault handler, it
> instead
> loads invalid TLB which in turn causes a DataTLBError exception.
Which, of course, is the logically correct way to do it. I guess I just
read too much into the suggestion in the manual to jump to the
"unused" Data Error exception vector under some miss conditions.
I tried to eliminate the immediate error fault that was going to
happen, but I guess we have to force that fault to get the proper
information in the fault registers.
> The comment on top of it haven't been update since the change.
>
> What about this?
Yes, thanks.
-- Dan
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