Subject: bug in arch/ppc/boot/common/util.S: cmplwi cr0,r3,r4 ?

From: Frank van Maarseveen <[email-masked]>
Date: Wed, 3 Aug 2005 15:18:48 +0200

I think "cmplwi" expects an immediate vale as last operand
around line 255 of arch/ppc/boot/common/util.S:

	addi	r4,r4,_etext@l		# r8 = &_etext
1:	dcbf	r0,r3			# Flush the data cache
	icbi	r0,r3			# Invalidate the instruction cache
	addi	r3,r3,0x10		# Increment by one cache line
	cmplwi	cr0,r3,r4		# Are we at the end yet?
	               ^^
	blt	1b			# No, keep flushing and invalidating

I guess it should have been:

	cmplw	cr0,r3,r4		# Are we at the end yet?

-- 
Frank