From: Stefan Roese <sr@denx•de>
To: linuxppc-embedded@ozlabs•org
Subject: Re: Yosemite/440EP 'issues' as a PCI target
Date: Fri, 10 Feb 2006 08:47:53 +0100 [thread overview]
Message-ID: <200602100847.54363.sr@denx.de> (raw)
In-Reply-To: <43EBD715.4020303@ovro.caltech.edu>
Hi David,
On Friday 10 February 2006 00:58, David Hawkins wrote:
> Now what if the host wants to interrupt the 440EP.
> Errr, there is no register defined for this purpose.
> The UIC chapter, p220-222 v1.18 manual indicates
> all the interrupt bits. Sure there are a couple of
> PCI source interrupts, one for writes to the PCI
> configuration-space command register (so can't really
> use that),
You could use it but I wouldn't recommend it.
> and another for power-management events.
>
> Have I missed something?
No. This sounds pretty much like the 405GP(r) which also lacks this
host-to-target interrupt facility.
> I'll have an FPGA/CPLD on the external bus, so I guess
> I can implement a mailbox/doorbell register in that
> and then have that register trigger an external interrupt
> on the 440EP. The 440EP PCI target BARs will then need
> to be setup to decode to the EBC decode range.
> Sounds like a hack ... (even more of a hack is to
> loop back a GPIO onto an EXTINT and setup the target
> decode to cover the GPIO registers, and the x86 can
> toggle a GPIO directly).
Yes, those are the choices available. If the CPU doesn't offer such features
directly, I wouldn't even call those solutions a "hack". ;-)
> Of course if I have a few unused peripherals I might
> be able to cause them to generate an interrupt. But
> that gets tricky since in a lot of cases, as device
> interrupts are often controlled via DCRs.
I wouldn't go this way.
Best regards,
Stefan
next prev parent reply other threads:[~2006-02-10 7:48 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-02-02 9:35 Yosemite/440EP why are readl()/ioread32() setup to readlittle-endian? Jenkins, Clive
2006-02-02 9:46 ` Eugene Surovegin
2006-02-02 14:37 ` Matt Porter
2006-02-02 17:45 ` Eugene Surovegin
2006-02-02 18:16 ` Matt Porter
2006-02-05 4:41 ` Yosemite/440EP PLB4 vs PLB3 DMA to PCI issue David Hawkins
2006-02-05 10:39 ` Wolfgang Denk
2006-02-05 23:47 ` David Hawkins
2006-02-06 18:31 ` Stefan Roese
2006-02-06 19:09 ` David Hawkins
2006-02-08 15:38 ` Stefan Roese
2006-02-08 18:43 ` David Hawkins
2006-02-09 0:34 ` Wolfgang Denk
2006-02-09 13:25 ` Mark Chambers
2006-02-09 23:58 ` Yosemite/440EP 'issues' as a PCI target David Hawkins
2006-02-10 7:47 ` Stefan Roese [this message]
2006-02-10 17:05 ` David Hawkins
2006-02-10 17:20 ` Andrew Armitage
2006-02-10 17:26 ` David Hawkins
2006-02-10 17:31 ` Wolfgang Denk
2006-02-10 17:38 ` David Hawkins
2006-02-10 17:58 ` David Hawkins
2006-02-11 6:03 ` David Hawkins
2006-02-11 8:21 ` Stefan Roese
2006-02-11 18:15 ` David Hawkins
2006-02-11 13:03 ` Wolfgang Denk
2006-02-10 17:59 ` Stefan Roese
2006-02-10 18:11 ` David Hawkins
2006-02-11 8:06 ` Stefan Roese
2006-02-11 18:06 ` David Hawkins
2006-02-11 19:00 ` David Hawkins
[not found] ` <001701c62e6c$09c48ea0$6401a8c0@CHUCK2>
2006-02-10 18:19 ` David Hawkins
2006-02-11 6:06 ` David Hawkins
[not found] ` <43ECCCA2.1070007@sandburst.com>
[not found] ` <43ECCE7A.4090507@ovro.caltech.edu>
[not found] ` <43ECD19E.8010604@sandburst.com>
2006-02-10 19:13 ` David Hawkins
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