Subject: Re: [PATCH] add delay around sl82c105_reset_engine calls

From: Olaf Hering <[email-masked]>
Date: Thu, 4 Jan 2007 07:42:54 +0100

On Mon, Dec 04, Alan wrote:

> On Mon, 4 Dec 2006 13:40:26 +0100 (MET)
> Olaf Hering <[email-masked]> wrote:
> 
> > 
> > 
> > the hald media changed polling does really confuse things.
> > noone knows why the delays are needed, but they give us access to
> > the CD.
> 
> Can you tell me what happens if you completely pull the reset out of the
> dma_end function. Do you still need delays then.

An udelay(50) will give reliable access to the drive, but there is still
one (or more) EH reset. The drive works without EH resets with udelay(100).

Signed-off-by: Olaf Hering <[email-masked]>

---
 drivers/ata/pata_sl82c105.c |    3 +++
 1 file changed, 3 insertions(+)

--- a/drivers/ata/pata_sl82c105.c
+++ b/drivers/ata/pata_sl82c105.c
@@ -187,7 +187,9 @@ static void sl82c105_bmdma_start(struct 
 {
 	struct ata_port *ap = qc->ap;
 
+	udelay(100);
 	sl82c105_reset_engine(ap);
+	udelay(100);
 
 	/* Set the clocks for DMA */
 	sl82c105_configure_dmamode(ap, qc->dev);
@@ -216,6 +218,7 @@ static void sl82c105_bmdma_stop(struct a
 
 	ata_bmdma_stop(qc);
 	sl82c105_reset_engine(ap);
+	udelay(100);
 
 	/* This will redo the initial setup of the DMA device to matching
 	   PIO timings */