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From: Olof Johansson <olof@lixom•net>
To: Paul Mackerras <paulus@samba•org>
Cc: linuxppc-dev@ozlabs•org
Subject: [PATCH] [v2] [5/8] pasemi: SMP timebase sync
Date: Sun, 04 Feb 2007 16:36:53 -0600	[thread overview]
Message-ID: <20070204223753.016205000@lixom.net> (raw)
In-Reply-To: 20070204223648.767950000@lixom.net

Timebase update is simple on PA6T, since global updates can be done from
one core by writing to an SPR.


Signed-off-by: Olof Johansson <olof@lixom•net>


Index: merge/arch/powerpc/platforms/pasemi/setup.c
===================================================================
--- merge.orig/arch/powerpc/platforms/pasemi/setup.c
+++ merge/arch/powerpc/platforms/pasemi/setup.c
@@ -48,13 +48,36 @@ static void pas_restart(char *cmd)
 }
 
 #ifdef CONFIG_SMP
+static DEFINE_SPINLOCK(timebase_lock);
+
+static void __devinit pas_give_timebase(void)
+{
+	unsigned long tb;
+
+	spin_lock(&timebase_lock);
+	mtspr(SPRN_TBCTL, TBCTL_FREEZE);
+	tb = mftb();
+	mtspr(SPRN_TBCTL, TBCTL_UPDATE_LOWER | (tb & 0xffffffff));
+	mtspr(SPRN_TBCTL, TBCTL_UPDATE_UPPER | (tb >> 32));
+	mtspr(SPRN_TBCTL, TBCTL_RESTART);
+	spin_unlock(&timebase_lock);
+	pr_debug("pas_give_timebase: cpu %d gave tb %lx\n",
+		 smp_processor_id(), tb);
+}
+
+static void __devinit pas_take_timebase(void)
+{
+	pr_debug("pas_take_timebase: cpu %d has tb %lx\n",
+		 smp_processor_id(), mftb());
+}
+
 struct smp_ops_t pas_smp_ops = {
 	.probe		= smp_mpic_probe,
 	.message_pass	= smp_mpic_message_pass,
 	.kick_cpu	= smp_generic_kick_cpu,
 	.setup_cpu	= smp_mpic_setup_cpu,
-	.give_timebase	= smp_generic_give_timebase,
-	.take_timebase	= smp_generic_take_timebase,
+	.give_timebase	= pas_give_timebase,
+	.take_timebase	= pas_take_timebase,
 };
 #endif /* CONFIG_SMP */
 
Index: merge/include/asm-powerpc/reg.h
===================================================================
--- merge.orig/include/asm-powerpc/reg.h
+++ merge/include/asm-powerpc/reg.h
@@ -392,6 +392,12 @@
 #define SPRN_HSRR0	0x13A	/* Save/Restore Register 0 */
 #define SPRN_HSRR1	0x13B	/* Save/Restore Register 1 */
 
+#define SPRN_TBCTL	0x35f	/* PA6T Timebase control register */
+#define   TBCTL_FREEZE		0x0000000000000000ull /* Freeze all tbs */
+#define   TBCTL_RESTART		0x0000000100000000ull /* Restart all tbs */
+#define   TBCTL_UPDATE_UPPER	0x0000000200000000ull /* Set upper 32 bits */
+#define   TBCTL_UPDATE_LOWER	0x0000000300000000ull /* Set lower 32 bits */
+
 #ifndef SPRN_SVR
 #define SPRN_SVR	0x11E	/* System Version Register */
 #endif

--

  parent reply	other threads:[~2007-02-04 22:41 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-02-04 22:36 [PATCH] [v2] [0/8] PA Semi patches Olof Johansson
2007-02-04 22:36 ` [PATCH] [v2] [1/8] pasemi: UART udbg support Olof Johansson
2007-02-04 22:36 ` [PATCH] [v2] [2/8] pasemi: Machine check handler Olof Johansson
2007-02-04 22:36 ` [PATCH] [v2] [3/8] pasemi: Idle loops Olof Johansson
2007-02-06 12:56   ` Arnd Bergmann
2007-02-06 15:09     ` Olof Johansson
2007-02-04 22:36 ` [PATCH] [v2] [4/8] pasemi: Implement restart Olof Johansson
2007-02-04 22:36 ` Olof Johansson [this message]
2007-02-04 22:36 ` [PATCH] [v2] [6/8] pasemi: Configure DMA controller interrupts Olof Johansson
2007-02-04 22:36 ` [PATCH] [v2] [7/8] pasemi: iommu support Olof Johansson
2007-02-04 22:36 ` [PATCH] [v2] [8/8] pasemi: defconfig Olof Johansson

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