Subject: Re: [PATCH] powerpc: add dts entries to 85xx for EDAC

From: [email-masked] (Olof Johansson)
Date: Mon, 7 May 2007 22:42:47 -0500

Hi,

On Mon, May 07, 2007 at 04:26:34PM -0700, Dave Jiang wrote:

> Adding memory-controller and l2-cache-controller entries to be used by EDAC as
> of_devices.
> 
> Signed-off-by: Dave Jiang <[email-masked]>
> 
> ---
> 
>  arch/powerpc/boot/dts/mpc8540ads.dts |   16 ++++++++++++++++
>  arch/powerpc/boot/dts/mpc8548cds.dts |   16 ++++++++++++++++
>  arch/powerpc/boot/dts/mpc8560ads.dts |   18 +++++++++++++++++-
>  3 files changed, 49 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
> index f261d64..f411bc1 100644
> --- a/arch/powerpc/boot/dts/mpc8540ads.dts
> +++ b/arch/powerpc/boot/dts/mpc8540ads.dts
> @@ -48,6 +48,22 @@
>  		reg = <e0000000 00100000>;	// CCSRBAR 1M
>  		bus-frequency = <0>;
>  
> +		memory-controller@2000 {
> +			compatible = "fsl,85xx-memory-controller";
> +			reg = <2000 1000>;
> +			interrupt-parent = <&mpic>;
> +			interrupts = <2 2>;
> +		};
> +
> +		l2-cache-controller@20000 {
> +			compatible = "fsl,85xx-memory-controller";

Interesting. Is the programming model really the same for the memory and cache controller?

-Olof