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From: Olof Johansson <olof@lixom•net>
To: Grant Likely <grant.likely@secretlab•ca>
Cc: linuxppc-dev@ozlabs•org
Subject: Re: [PATCH 06/18] [POWERPC] Fix UARTLITE reg io for little-endian architectures (ie. microblaze)
Date: Fri, 28 Sep 2007 15:47:49 -0500	[thread overview]
Message-ID: <20070928204749.GD23749@lixom.net> (raw)
In-Reply-To: <fa686aa40709281342h4f8ff3fdv265e8098d2da6f52@mail.gmail.com>

On Fri, Sep 28, 2007 at 02:42:32PM -0600, Grant Likely wrote:
> On 9/28/07, Olof Johansson <olof@lixom•net> wrote:
>
> > Hmm, I see the start changed, and you're now reading/writing a full
> > 32-bit word instead of individual bytes. Still, looks a little fishy to
> > me. Wouldn't it be more appropriate to change the ULITE_RX offset to be
> > 3 higher and still read/write bytes?
> >
> > Or are the registers defined as 32-bit ones? (I don't remember, it was
> > so long since I touched uartlite myself. :-)
> 
> All the registers are defined as 32 bit ones.  I think it makes more
> sense to access the registers as they are documented, and it
> eliminates the 'magic' +3 needed to make it work now.

Ok, thaks for the clarification. Feel free to add it as motivation in
the patch description. :)

> > (Same for the other functions below, but the general principle applies.)
> >
> > Also, I'm not sure you need to cast port->membase to void*, do you? The
> > math will still be right since it's declared as char *.
> 
> membase is now defined as u32*, so the cast is needed.

Hm, I must have looked at a stale tree.


Thanks,

-Olof

  reply	other threads:[~2007-09-28 20:44 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-09-28 18:15 [PATCH 00/18] Virtex support in arch/powerpc Grant Likely
2007-09-28 18:15 ` [PATCH 01/18] Virtex: Add uartlite bootwrapper driver Grant Likely
2007-09-28 19:45   ` Arnd Bergmann
2007-09-28 20:04     ` Grant Likely
2007-09-28 20:26       ` Josh Boyer
2007-09-28 23:31         ` Arnd Bergmann
2007-10-02 15:04   ` Peter Korsgaard
2007-10-02 15:12     ` Grant Likely
2007-09-28 18:16 ` [PATCH 02/18] Add Kconfig macros for Xilinx Virtex support Grant Likely
2007-09-28 18:20   ` Scott Wood
2007-09-28 19:35     ` Grant Likely
2007-09-28 20:19   ` Olof Johansson
2007-09-28 20:39     ` Grant Likely
2007-09-28 18:16 ` [PATCH 03/18] Virtex: add xilinx interrupt controller driver Grant Likely
2007-09-28 20:17   ` Olof Johansson
2007-09-28 20:26     ` Grant Likely
2007-09-28 18:16 ` [PATCH 04/18] Xilinx Virtex: Add generic virtex board support Grant Likely
2007-09-28 18:16 ` [PATCH 05/18] Add PowerPC Xilinx Virtex entry to maintainers Grant Likely
2007-09-28 19:05   ` Grant Likely
2007-10-02  0:40     ` Paul Mackerras
2007-10-02 15:26   ` Peter Korsgaard
2007-09-28 18:17 ` [PATCH 06/18] [POWERPC] Fix UARTLITE reg io for little-endian architectures (ie. microblaze) Grant Likely
2007-09-28 20:31   ` Olof Johansson
2007-09-28 20:42     ` Grant Likely
2007-09-28 20:47       ` Olof Johansson [this message]
2007-09-28 20:50         ` Grant Likely
2007-09-28 20:52           ` Grant Likely
2007-10-02 15:40   ` Peter Korsgaard
2007-10-02 15:54     ` Grant Likely
2007-09-28 18:17 ` [PATCH 07/18] Uartlite: change name of ports to ulite_ports Grant Likely
2007-10-02 15:27   ` Peter Korsgaard
2007-09-28 18:17 ` [PATCH 08/18] Uartlite: Add macro for uartlite device name Grant Likely
2007-10-02 15:29   ` Peter Korsgaard
2007-10-02 15:34     ` Grant Likely
2007-09-28 18:17 ` [PATCH 09/18] Uartlite: Separate the bus binding from the driver proper Grant Likely
2007-09-28 18:17 ` [PATCH 10/18] Uartlite: improve in-code comments Grant Likely
2007-09-28 19:43   ` Arnd Bergmann
2007-09-28 20:02     ` Grant Likely
2007-10-02 15:24   ` Peter Korsgaard
2007-09-28 18:17 ` [PATCH 11/18] Virtex: Port UARTLITE driver to of-platform-bus Grant Likely
2007-09-28 19:32   ` Arnd Bergmann
2007-10-02 15:47   ` Peter Korsgaard
2007-10-02 15:56     ` Grant Likely
2007-10-02 16:01       ` Peter Korsgaard
2007-09-28 18:17 ` [PATCH 12/18] Uartlite: Let the console be initialized earlier Grant Likely
2007-09-28 19:40   ` Arnd Bergmann
2007-09-28 20:01     ` Grant Likely
2007-09-28 18:18 ` [PATCH 13/18] Add Xilinx SystemACE entry to maintainers Grant Likely
2007-09-28 18:18 ` [PATCH 14/18] Sysace: Use the established platform bus api Grant Likely
2007-09-28 18:18 ` [PATCH 15/18] Sysace: Move structure allocation from bus binding into common code Grant Likely
2007-09-28 18:18 ` [PATCH 16/18] Sysace: minor rework and cleanup changes Grant Likely
2007-09-28 18:18 ` [PATCH 17/18] Sysace: Move IRQ handler registration to occur after FSM is initialized Grant Likely
2007-09-28 18:18 ` [PATCH 18/18] xsysace: Add of_platform_bus binding Grant Likely
2007-09-28 19:46 ` [PATCH 00/18] Virtex support in arch/powerpc Arnd Bergmann
2007-09-28 20:05   ` Grant Likely

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