From: "Rick Moleres" <Rick.Moleres@xilinx•com>
To: "Grant Likely" <grant.likely@secretlab•ca>,
"Jean-Samuel Chenard" <jsamch@macs•ece.mcgill.ca>
Cc: linuxppc-embedded@ozlabs•org
Subject: RE: Xilinx ML310 Linux 2.6 PCI bridge
Date: Mon, 10 Dec 2007 16:57:29 -0700 [thread overview]
Message-ID: <20071210235609.91265F18074@mail188-sin.bigfish.com> (raw)
In-Reply-To: <fa686aa40712082218k7e520e45q1266ecb4692b7dbb@mail.gmail.com>
Grant,
Can you give me more details on why you say the opb_pci bridge is badly
broken? I know there have been issues with it in the past, but I'm not
aware of major outages (perhaps I'm just not in the loop).
> However, word of warning. The Xilinx PCI bridge is badly broken.
> Xilinx is not supporting the PCI core and it is missing the ability to
> do certain types of transfers. Last I heard, Xilinx has no plans to
> fix their PCI core either.
The opb_pci and plb_pci (plbv34) bridges have transitioned to the
plbv36_pci bridge in EDK 9.2 and later. This bridge is fully supported
and has been tested under MontaVista's 2.6.10 kernel. I believe only
critical issues will be fixed in the opb/plbv34.
Thanks,
Rick
next prev parent reply other threads:[~2007-12-10 23:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-12-09 5:51 Xilinx ML310 Linux 2.6 PCI bridge Jean-Samuel Chenard
2007-12-09 6:18 ` Grant Likely
2007-12-09 17:32 ` Jean-Samuel Chenard
2007-12-09 20:23 ` Grant Likely
2007-12-10 5:46 ` Stephen Neuendorffer
2007-12-10 16:33 ` Jean-Samuel Chenard
2007-12-10 18:47 ` Stephen Neuendorffer
2007-12-13 16:46 ` Grant Likely
2007-12-10 23:57 ` Rick Moleres [this message]
2007-12-11 0:20 ` Grant Likely
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