Subject: [PATCH 4/4] PowerPC: Add PCI node to 440GRx Rainier DTS.

From: Valentine Barshak <[email-masked]>
Date: Fri, 21 Dec 2007 19:27:08 +0300

This adds PCI entry to PowerPC 440GRx Rainier DTS.

Signed-off-by: Valentine Barshak <[email-masked]>
---
 arch/powerpc/boot/dts/rainier.dts |   27 +++++++++++++++++++++++++++
 1 files changed, 27 insertions(+)

--- linux-2.6.orig/arch/powerpc/boot/dts/rainier.dts	2007-12-19 16:00:01.000000000 +0300
+++ linux-2.6/arch/powerpc/boot/dts/rainier.dts	2007-12-20 21:59:42.000000000 +0300
@@ -317,6 +317,33 @@
 				has-new-stacr-staopc;
 			};
 		};
+
+		PCI0: pci@1ec000000 {
+			device_type = "pci";
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
+			primary;
+			reg = <1 eec00000 8	/* Config space access */
+			       1 eed80000 4	/* IACK */
+			       1 eed80000 4	/* Special cycle */
+			       1 ef400000 40>;	/* Internal registers */
+
+			/* Outbound ranges, one memory and one IO,
+			 * later cannot be changed. Chip supports a second
+			 * IO range but we don't use it for now
+			 */
+			ranges = <02000000 0 80000000 1 80000000 0 10000000
+				01000000 0 00000000 1 e8000000 0 00100000>;
+
+			/* Inbound 2GB range starting at 0 */
+			dma-ranges = <42000000 0 0 0 0 0 80000000>;
+
+			/* All PCI interrupts are routed to IRQ 67 */
+			interrupt-map-mask = <0000 0 0 0>;
+			interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
+		};
 	};
 
 	chosen {