RE: MMU failure, Virtex4-FX60

From: "Stephen Neuendorffer" <stephen.neuendorffer@xilinx•com>
To: "Robert Woodworth" <rwoodworth@securics•com>,
	"Grant Likely" <grant.likely@secretlab•ca>
Cc: linuxppc-embedded@ozlabs•org
Subject: RE: MMU failure, Virtex4-FX60
Date: Wed, 9 Jan 2008 08:46:09 -0800	[thread overview]
Message-ID: <20080109164610.EABD91010053@mail17-blu.bigfish.com> (raw)
In-Reply-To: <1199829276.4598.7.camel@PisteOff>

Passed along....

"Most likely bootloop is not enabled. The processor takes an invalid
instruction and registers a following machine check exception. The
machine check exception is taken when it is enabled in the MSR causing
Linux to crash."

Steve

> -----Original Message-----
> From: linuxppc-embedded-bounces+stephen=3Dneuendorffer.name@ozlabs•org
[mailto:linuxppc-embedded-
> bounces+stephen=3Dneuendorffer.name@ozlabs•org] On Behalf Of Robert
Woodworth
> Sent: Tuesday, January 08, 2008 1:55 PM
> To: Grant Likely
> Cc: linuxppc-embedded@ozlabs•org
> Subject: Re: MMU failure, Virtex4-FX60
>=20
> After further investigation...
> There is a pending interrupt from the PLB waiting at bootup and it
gets
> hit by Linux when the MSR gets set and enables critical interrupts
(same
> time that it jumps into 0xC000XXXX).  The kernel code detects the
> interrupt as a PLB data bus error and goes into crash sequence die().
>=20
> I think I have a problem with my reset hardware, such that the PLB is
> not getting reset correctly with the PPC.  With all interrupts
disabled
> and running a standalone C program, the PLB and memory work fine.
> Any Virtex experts out there have any hints?
>=20
>=20
>=20
> RJW.
>=20
>=20
>=20
>=20
> On Mon, 2008-01-07 at 11:21 -0700, Grant Likely wrote:
> > On 1/7/08, Robert Woodworth <rwoodworth@securics•com> wrote:
> > > Hello!
> > >
> > > I'm building a new Virtex4-FX60 device.  I have built it with the
new
> > > MPMC3 and a 256MB SO-DIMM.  It works successfully with a
"mem-test" type
> > > embedded program.
> > >
> > > I cannot get it to boot a Linux kernel.  I have traced it down to
the
> > > MMU not getting mapped correctly.
> > >
> > > I can load the kernel via jtag, get the pre-boot messages on the
serial
> > > but then when it tries to jump to 0xc0002218 (start_here:
head_4xxx.S)
> > > it fails with a "Machine check exception; invalid instruction
address".
> > >
> > > Using the debugger and examining the memory once the mmu is
suppose to
> > > be configured, I see that it is not mapping 0xc0000000  to the
proper
> > > location.  I'm sure I've set something up wrong in my FPGA and I
need to
> > > re-synthesize.  But what?
> >
> > Hmmm, I haven't seen that failure mode before.  MMU handling on an
of
> > my virtex platforms has never been a problem.  Take a look at the
TLB
> > registers to see how they are configured to see if the mappings are
> > really getting written.
> >
> > What kernel version are you using?
> >
> > Cheers,
> > g.
> >
>=20
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