Subject: Re: [PATCH] powerpc/cell/axon-msi: retry on missing interrupt

From: Arnd Bergmann <[email-masked]>
Date: Tue, 18 Nov 2008 21:18:40 +0100

On Tuesday 18 November 2008, Giora Biran wrote:
> 
> Arnd,
> >> However, reading that position does not flush the DMA, so that we can
> observe stale data in the buffer.
> 
> The position register is in the DCR space from which a read does not flush
> the interrupt. But it seem that reading a register mapped to the PLB5 can
> flush the interrupts if the C3PO is set to producer/consumer mode.
> 

Right, however I guess that implementing this in Linux would either
get a lot uglier than the current patch, or require an updated firmware.
The problem here is that the MSIC device node only provides a DCR
register range, and no MMIO register range, so there is no clean
way for the device driver to know about any register it can safely
read.

	Arnd <><