Subject: Re: [PATCH 9/10] powerpc/mm: Rework usage of _PAGE_COHERENT/NO_CACHE/GUARDED v2

From: "Gerhard Pircher" <[email-masked]>
Date: Sun, 18 Jan 2009 20:43:53 +0100

-------- Original-Nachricht --------
> Datum: Fri, 19 Dec 2008 16:13:51 +1100
> Von: Benjamin Herrenschmidt <[email-masked]>
> An: Paul Mackerras <[email-masked]>
> CC: [email-masked], Kumar Gala <[email-masked]>
> Betreff: [PATCH 9/10] powerpc/mm: Rework usage of	_PAGE_COHERENT/NO_CACHE/GUARDED v2

> Currently, we never set _PAGE_COHERENT in the PTEs, we just OR it in
> in the hash code based on some CPU feature bit. We also manipulate
> _PAGE_NO_CACHE and _PAGE_GUARDED by hand in all sorts of places.
> 
> This changes the logic so that instead, the PTE now contains
> _PAGE_COHERENT for all normal RAM pages thay have I = 0 on platforms
> that need it. The hash code clears it if the feature bit is not set.
This somehow breaks Linux on my AmigaOne, as its northbridge doesn't like pages
marked as coherent. I removed the CPU_FTR_NEED_COHERENT feature bit
in setup_32.c before the fixups are done, but the system still locks up (doing the
fixup in the platform code is too late). It only works stable, if I remove the
_PAGE_COHERENT flag in pgtable-ppc32.h below.

> +#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
> +#define _PAGE_BASE	(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)

>  BEGIN_FTR_SECTION
> -	ori	r8,r8,_PAGE_COHERENT	/* set M (coherence required) */
> -END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT)
> +	rlwinm	r8,r8,0,~_PAGE_COHERENT	/* clear M (coherence not required) */
> +END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
I'm pretty sure that the hack for setup_32.c above protects this code in hash_low_32.S/
create_hpte() from being overwritten with nops. But I wonder which other paths exists
in the memory management code to set the coherent flag in PTEs? Any ideas how I
can get it to work without removing _PAGE_COHERENT from _PAGE_BASE?

Thanks!

Gerhard
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