Subject: Re: [PATCH 5/7] powerpc/85xx: Add power management support for MPC85xxMDS boards

From: Scott Wood <[email-masked]>
Date: Thu, 5 Nov 2009 10:53:01 -0600

On Thu, Nov 05, 2009 at 08:06:51AM -0600, Kumar Gala wrote:
>
> On Nov 5, 2009, at 8:04 AM, Anton Vorontsov wrote:
>
>> On Thu, Nov 05, 2009 at 07:58:49AM -0600, Kumar Gala wrote:
>> [...]
>>> --- a/arch/powerpc/boot/dts/mpc8568mds.dts
>>> +++ b/arch/powerpc/boot/dts/mpc8568mds.dts
>>> @@ -40,6 +40,8 @@
>>> 			i-cache-line-size = <32>;	// 32 bytes
>>> 			d-cache-size = <0x8000>;		// L1, 32K
>>> 			i-cache-size = <0x8000>;		// L1, 32K
>>> +			sleep = <&pmc 0x00008000	// core
>>> +				 &pmc 0x00004000>;	// timebase
>>>
>>> Just so I'm clear this is the devdisr bit position?
>>
>> Yep, as described in the bindings.
>
> I don't think the binding is clear that for 85xx these are DEVDISR bit  
> positions for the given SoC.

>>From dts-bindings/fsl/pmc.txt:

  fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the
  first of which will be ORed into DEVDISR (and the second into
  DEVDISR2, if present -- this cell should be zero or absent if the
  hardware does not have DEVDISR2) upon a request for permanent device
  disabling.  This sleep controller does not support configuring devices
  to disable during system sleep (unless supported by another compatible
  match), or dynamically.

-Scott