Subject: Re: [PATCH] powerpc/5200: tighten up ac97 reset timing

From: Wolfram Sang <[email-masked]>
Date: Fri, 3 Sep 2010 18:49:53 +0200

> > Yes, but it is way more readable. Does the extra delay hurt? The value
> > of 7 looks a bit magic to me. Are you sure it will do for various
> > clock frequencies?
> >
> 
> The reset is happening in the gpio spinlock, so I am trying to keep busy
> waiting to a minimum.  The magic value of 7 calculates to *roughly* 200ns
> with a system timebase of 33mhz.  This timebase drives the mpc5200(b) at
> its max clock speed of 400mhz, so slower frequencies should just extend the
> delay, which is acceptable.  If you strongly object to the use of __delay
> I can change it to ndelay.

That might be a valid reason, dunno the details here. I'll leave the
final decision for Grant. If the use of __delay is acceptable, the
calculation that led to 7 should be explained, I think.

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