Subject: Re: [PATCH] ppc44x:PHY fixup for USB on canyonlands board

From: Stefan Roese <[email-masked]>
Date: Wed, 10 Nov 2010 15:50:15 +0100

On Wednesday 10 November 2010 12:37:15 Rupjyoti Sarmah wrote:
> This fix is a reset for USB PHY that requires some amount of time for power
> to be stable on Canyonlands.
> 
> Signed-off-by: Rupjyoti Sarmah <[email-masked]>
> ---
>  arch/powerpc/boot/dts/canyonlands.dts     |   11 ++++
>  arch/powerpc/platforms/44x/44x.h          |    5 ++
>  arch/powerpc/platforms/44x/Kconfig        |    7 ++
>  arch/powerpc/platforms/44x/Makefile       |    1 +
>  arch/powerpc/platforms/44x/ppc44x_fixup.c |   90
> +++++++++++++++++++++++++++++ 5 files changed, 114 insertions(+), 0
> deletions(-)
>  create mode 100644 arch/powerpc/platforms/44x/ppc44x_fixup.c
> 
> diff --git a/arch/powerpc/boot/dts/canyonlands.dts
> b/arch/powerpc/boot/dts/canyonlands.dts index a303703..d6e9ba2 100644
> --- a/arch/powerpc/boot/dts/canyonlands.dts
> +++ b/arch/powerpc/boot/dts/canyonlands.dts
> @@ -171,6 +171,11 @@
>  				      0x5 0x4>;     /* AHBDMA */
>  		};
> 
> +		CPLD: cpld@e1000000 {
> +			compatible = "apm, ppc460ex-bcsr";
> +			reg = <4 0xe1000000 0x9>;
> +		};

This node should be moved to the EBC section. It would look something like 
this then (note the reg property change here):

				CPLD: cpld@2,0 {
					...
					reg = <2 0x0 0x9>;
				};

Cheers,
Stefan