From: Andrew Morton <akpm@linux-foundation•org>
To: Liu Gang-B34182 <B34182@freescale•com>
Cc: Gala Kumar-B11780 <B11780@freescale•com>,
"'linuxppc-dev@lists•ozlabs.org'" <linuxppc-dev@lists•ozlabs.org>,
Li Yang-R58472 <r58472@freescale•com>,
Zang Roy-R61911 <r61911@freescale•com>
Subject: Re: [PATCH] fsl-rio: Correct IECSR register clear value
Date: Wed, 24 Aug 2011 11:53:55 -0700 [thread overview]
Message-ID: <20110824115355.92febdfc.akpm@linux-foundation.org> (raw)
In-Reply-To: <9A1C2A9ACC704641BC472A1588CE16470EC9C3@039-SN1MPN1-004.039d.mgd.msft.net>
On Wed, 24 Aug 2011 09:31:21 +0000
Liu Gang-B34182 <B34182@freescale•com> wrote:
> Hi, Andrew,
>
> Thank you for applying the patch "[PATCH] rio: Use discovered bit to test if enumeration is complete "!
>
> So far the following patch "[PATCH] fsl-rio: Correct IECSR register clear value " has no comment or response.
Perhaps because you didn't tell anyone what the patch does.
> To: linuxppc-dev@ozlabs•org
> Cc: akpm@linux-foundation•org; Li Yang-R58472; Gala Kumar-B11780; Zang Roy-R61911; Liu Gang-B34182; Liu Gang-B34182
> Subject: [PATCH] fsl-rio: Correct IECSR register clear value
>
> The RETE bit in IECSR is cleared by writing a 1 to it.
>
> Signed-off-by: Liu Gang <Gang.Liu@freescale•com>
> ---
> arch/powerpc/sysdev/fsl_rio.c | 5 +++--
> 1 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index b3fd081..cdd765b 100644
> --- a/arch/powerpc/sysdev/fsl_rio.c
> +++ b/arch/powerpc/sysdev/fsl_rio.c
> @@ -54,6 +54,7 @@
> #define ODSR_CLEAR 0x1c00
> #define LTLEECSR_ENABLE_ALL 0xFFC000FC
> #define ESCSR_CLEAR 0x07120204
> +#define IECSR_CLEAR 0x80000000
>
> #define RIO_PORT1_EDCSR 0x0640
> #define RIO_PORT2_EDCSR 0x0680
> @@ -1089,11 +1090,11 @@ static void port_error_handler(struct rio_mport *port, int offset)
>
> if (offset == 0) {
> out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0);
> - out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), 0);
> + out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR);
> out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR);
> } else {
> out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0);
> - out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), 0);
> + out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR);
> out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);
> }
> }
Apparently it fixes some bug. But because you didn't tell us what the
user-visible effects of that bug are, I am unable to determine what
kernel versions (if any) the patch should be merged into.
next prev parent reply other threads:[~2011-08-24 18:54 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-08 10:13 [PATCH] fsl-rio: Correct IECSR register clear value Liu Gang
2011-08-24 9:31 ` Liu Gang-B34182
2011-08-24 18:53 ` Andrew Morton [this message]
2011-08-25 3:39 ` Liu Gang-B34182
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