Subject: Re: [PATCH 8/8][v4] powerpc/perf: Export Power7 memory hierarchy info to user space.

From: Sukadev Bhattiprolu <[email-masked]>
Date: Tue, 24 Sep 2013 15:30:18 -0700

Anshuman Khandual [[email-masked]] wrote:
| On 09/14/2013 06:19 AM, Sukadev Bhattiprolu wrote:
| > +static void power7_get_mem_data_src(union perf_mem_data_src *dsrc,
| > +			struct pt_regs *regs)
| > +{
| > +	u64 idx;
| > +	u64 mmcra = regs->dsisr;
| > +	u64 addr;
| > +	int ret;
| > +	unsigned int instr;
| > +
| > +	if (mmcra & POWER7_MMCRA_DCACHE_MISS) {
| > +		idx = mmcra & POWER7_MMCRA_DCACHE_SRC_MASK;
| > +		idx >>= POWER7_MMCRA_DCACHE_SRC_SHIFT;
| > +
| > +		dsrc->val |= dcache_src_map[idx];
| > +		return;
| > +	}
| > +
| > +	instr = 0;
| > +	addr = perf_instruction_pointer(regs);
| > +
| > +	if (is_kernel_addr(addr))
| > +		instr = *(unsigned int *)addr;
| > +	else {
| > +		pagefault_disable();
| > +		ret = __get_user_inatomic(instr, (unsigned int __user *)addr);
| > +		pagefault_enable();
| > +		if (ret)
| > +			instr = 0;
| > +	}
| > +	if (instr && instr_is_load_store(&instr))
| 
| 
| Wondering if there is any possibility of getting positive values for
| "(mmcra & POWER7_MMCRA_DCACHE_SRC_MASK) >> POWER7_MMCRA_DCACHE_SRC_SHIFT"
| when the marked instruction did not have MMCRA[POWER7_MMCRA_DCACHE_MISS]
| bit set. In that case we should actually compute dsrc->val as in the previous
| case. I did couple of experiments on a P7 box, but was not able to find a
| instance for a marked instruction whose MMCRA[POWER7_MMCRA_DCACHE_MISS] bit
| not set and have a positive value POWER7_MMCRA_DCACHE_SRC field.

Confirmed again with the hardware team that if there was no DCACHE_MISS,
the DCACHE_SRC field will be clear.

Thanks,

Sukadev