Subject: Re: Problem reading and programming memory location...

From: Anatolij Gustschin <[email-masked]>
Date: Wed, 13 Nov 2013 19:06:06 +0100

On Wed, 13 Nov 2013 14:48:24 +0100
neorf3k <[email-masked]> wrote:

> Yes, that is a device on the lpb via an fpga. We  have tried to configure
> the chip select 4 configuration register at address MBAR + 0x0310, and it
> seems to be ok. what do you mean with “chip select parameters”?

I meant the settings you can set up in the Chip Select 1–7 Configuration
Registers, like address and data bus size, wait-states, etc.

> We have been able to edit it in U-BOOT, and the board (that chip) now works…
> The strange thing, is that when we read in linux, at that address, we see
> other content value…
> Suggestions?

if you can access the register under U-Boot and read out the
expected values, then the access should work under Linux too,
assuming the chip select config is not overwritten somewhere
while booting and the register address range is mapped correctly.
I don't know your code, so I would first check if the register
mapping is done correctly, i.e. check the return value of ioremap()
for errors, then check if the chip select configuration is still
valid when the kernel is up. Also verify that your fpga is not
in the reset state when Linux is running.

thanks,

Anatolij