From: Wei Yang <weiyang@linux•vnet.ibm.com>
To: Gavin Shan <gwshan@linux•vnet.ibm.com>
Cc: Wei Yang <weiyang@linux•vnet.ibm.com>,
aik@ozlabs•ru, benh@kernel•crashing.org, linuxppc-dev@ozlabs•org
Subject: Re: [PATCH V2 6/6] powerpc/powernv: allocate discrete PE# when using M64 BAR in Single PE mode
Date: Thu, 6 Aug 2015 21:41:41 +0800 [thread overview]
Message-ID: <20150806134141.GA6235@richard> (raw)
In-Reply-To: <20150806053601.GB5636@gwshan>
On Thu, Aug 06, 2015 at 03:36:01PM +1000, Gavin Shan wrote:
>On Wed, Aug 05, 2015 at 09:25:03AM +0800, Wei Yang wrote:
>>When M64 BAR is set to Single PE mode, the PE# assigned to VF could be
>>discrete.
>>
>>This patch restructures the patch to allocate discrete PE# for VFs when M64
>>BAR is set to Single PE mode.
>>
>>Signed-off-by: Wei Yang <weiyang@linux•vnet.ibm.com>
>>---
>> arch/powerpc/include/asm/pci-bridge.h | 2 +-
>> arch/powerpc/platforms/powernv/pci-ioda.c | 69 +++++++++++++++++++++--------
>> 2 files changed, 51 insertions(+), 20 deletions(-)
>>
>>diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
>>index 8aeba4c..72415c7 100644
>>--- a/arch/powerpc/include/asm/pci-bridge.h
>>+++ b/arch/powerpc/include/asm/pci-bridge.h
>>@@ -213,7 +213,7 @@ struct pci_dn {
>> #ifdef CONFIG_PCI_IOV
>> u16 vfs_expanded; /* number of VFs IOV BAR expanded */
>> u16 num_vfs; /* number of VFs enabled*/
>>- int offset; /* PE# for the first VF PE */
>>+ int *offset; /* PE# for the first VF PE or array */
>> bool m64_single_mode; /* Use M64 BAR in Single Mode */
>> #define IODA_INVALID_M64 (-1)
>> int (*m64_map)[PCI_SRIOV_NUM_BARS];
>
>how about renaming "offset" to "pe_num_map", or "pe_map" ? Similar to the comments
>I gave to the "m64_bar_map", num_of_max_vfs entries can be allocated. Though not
>all of them will be used, not too much memory will be wasted.
>
Thanks for your comment.
I have thought about change the name to make it more self explain. While
another fact I want to take in is this field is also used to be reflect the
shift offset when M64 BAR is used in the Shared Mode. So I maintain the name.
How about use "enum", one maintain the name "offset", and another one rename to
"pe_num_map". And use the meaningful name at proper place?
>>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
>>index 4042303..9953829 100644
>>--- a/arch/powerpc/platforms/powernv/pci-ioda.c
>>+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
>>@@ -1243,7 +1243,7 @@ static int pnv_pci_vf_assign_m64(struct pci_dev *pdev, u16 num_vfs)
>>
>> /* Map the M64 here */
>> if (pdn->m64_single_mode) {
>>- pe_num = pdn->offset + j;
>>+ pe_num = pdn->offset[j];
>> rc = opal_pci_map_pe_mmio_window(phb->opal_id,
>> pe_num, OPAL_M64_WINDOW_TYPE,
>> pdn->m64_map[j][i], 0);
>>@@ -1347,7 +1347,7 @@ void pnv_pci_sriov_disable(struct pci_dev *pdev)
>> struct pnv_phb *phb;
>> struct pci_dn *pdn;
>> struct pci_sriov *iov;
>>- u16 num_vfs;
>>+ u16 num_vfs, i;
>>
>> bus = pdev->bus;
>> hose = pci_bus_to_host(bus);
>>@@ -1361,14 +1361,18 @@ void pnv_pci_sriov_disable(struct pci_dev *pdev)
>>
>> if (phb->type == PNV_PHB_IODA2) {
>> if (!pdn->m64_single_mode)
>>- pnv_pci_vf_resource_shift(pdev, -pdn->offset);
>>+ pnv_pci_vf_resource_shift(pdev, -*pdn->offset);
>>
>> /* Release M64 windows */
>> pnv_pci_vf_release_m64(pdev, num_vfs);
>>
>> /* Release PE numbers */
>>- bitmap_clear(phb->ioda.pe_alloc, pdn->offset, num_vfs);
>>- pdn->offset = 0;
>>+ if (pdn->m64_single_mode) {
>>+ for (i = 0; i < num_vfs; i++)
>>+ pnv_ioda_free_pe(phb, pdn->offset[i]);
>>+ } else
>>+ bitmap_clear(phb->ioda.pe_alloc, *pdn->offset, num_vfs);
>>+ kfree(pdn->offset);
>
>Can pnv_ioda_free_pe() be reused to release PE ?
You mean use it to similar thing in pnv_ioda_deconfigure_pe()?
>
>> }
>> }
>>
>>@@ -1394,7 +1398,10 @@ static void pnv_ioda_setup_vf_PE(struct pci_dev *pdev, u16 num_vfs)
>>
>> /* Reserve PE for each VF */
>> for (vf_index = 0; vf_index < num_vfs; vf_index++) {
>>- pe_num = pdn->offset + vf_index;
>>+ if (pdn->m64_single_mode)
>>+ pe_num = pdn->offset[vf_index];
>>+ else
>>+ pe_num = *pdn->offset + vf_index;
>>
>> pe = &phb->ioda.pe_array[pe_num];
>> pe->pe_number = pe_num;
>>@@ -1436,6 +1443,7 @@ int pnv_pci_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
>> struct pnv_phb *phb;
>> struct pci_dn *pdn;
>> int ret;
>>+ u16 i;
>>
>> bus = pdev->bus;
>> hose = pci_bus_to_host(bus);
>>@@ -1462,19 +1470,38 @@ int pnv_pci_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
>> }
>>
>> /* Calculate available PE for required VFs */
>>- mutex_lock(&phb->ioda.pe_alloc_mutex);
>>- pdn->offset = bitmap_find_next_zero_area(
>>- phb->ioda.pe_alloc, phb->ioda.total_pe,
>>- 0, num_vfs, 0);
>>- if (pdn->offset >= phb->ioda.total_pe) {
>>+ if (pdn->m64_single_mode) {
>>+ pdn->offset = kmalloc(sizeof(*pdn->offset) * num_vfs,
>>+ GFP_KERNEL);
>>+ if (!pdn->offset)
>>+ return -ENOMEM;
>>+ for (i = 0; i < num_vfs; i++)
>>+ pdn->offset[i] = IODA_INVALID_PE;
>>+ for (i = 0; i < num_vfs; i++) {
>>+ pdn->offset[i] = pnv_ioda_alloc_pe(phb);
>>+ if (pdn->offset[i] == IODA_INVALID_PE) {
>>+ ret = -EBUSY;
>>+ goto m64_failed;
>>+ }
>>+ }
>>+ } else {
>>+ pdn->offset = kmalloc(sizeof(*pdn->offset), GFP_KERNEL);
>>+ if (!pdn->offset)
>>+ return -ENOMEM;
>>+ mutex_lock(&phb->ioda.pe_alloc_mutex);
>>+ *pdn->offset = bitmap_find_next_zero_area(
>>+ phb->ioda.pe_alloc, phb->ioda.total_pe,
>>+ 0, num_vfs, 0);
>>+ if (*pdn->offset >= phb->ioda.total_pe) {
>>+ mutex_unlock(&phb->ioda.pe_alloc_mutex);
>>+ dev_info(&pdev->dev, "Failed to enable VF%d\n", num_vfs);
>>+ kfree(pdn->offset);
>>+ return -EBUSY;
>>+ }
>>+ bitmap_set(phb->ioda.pe_alloc, *pdn->offset, num_vfs);
>> mutex_unlock(&phb->ioda.pe_alloc_mutex);
>>- dev_info(&pdev->dev, "Failed to enable VF%d\n", num_vfs);
>>- pdn->offset = 0;
>>- return -EBUSY;
>> }
>>- bitmap_set(phb->ioda.pe_alloc, pdn->offset, num_vfs);
>> pdn->num_vfs = num_vfs;
>>- mutex_unlock(&phb->ioda.pe_alloc_mutex);
>>
>> /* Assign M64 window accordingly */
>> ret = pnv_pci_vf_assign_m64(pdev, num_vfs);
>>@@ -1489,7 +1516,7 @@ int pnv_pci_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
>> * Otherwise, the PE# for the VF will conflict with others.
>> */
>> if (!pdn->m64_single_mode) {
>>- ret = pnv_pci_vf_resource_shift(pdev, pdn->offset);
>>+ ret = pnv_pci_vf_resource_shift(pdev, *pdn->offset);
>> if (ret)
>> goto m64_failed;
>> }
>>@@ -1501,8 +1528,12 @@ int pnv_pci_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
>> return 0;
>>
>> m64_failed:
>>- bitmap_clear(phb->ioda.pe_alloc, pdn->offset, num_vfs);
>>- pdn->offset = 0;
>>+ if (pdn->m64_single_mode) {
>>+ for (i = 0; i < num_vfs; i++)
>>+ pnv_ioda_free_pe(phb, pdn->offset[i]);
>>+ } else
>>+ bitmap_clear(phb->ioda.pe_alloc, *pdn->offset, num_vfs);
>>+ kfree(pdn->offset);
>>
>> return ret;
>> }
>>--
>>1.7.9.5
>>
--
Richard Yang
Help you, Help me
next prev parent reply other threads:[~2015-08-06 13:42 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-29 7:22 [PATCH] powerpc/powernv: use one M64 BAR in Single PE mode for one VF BAR Wei Yang
2015-07-30 1:15 ` Gavin Shan
2015-07-30 5:43 ` Wei Yang
2015-07-31 0:13 ` Gavin Shan
2015-07-31 2:01 ` Wei Yang
2015-08-05 1:24 ` [PATCH V2 0/6] Redesign SR-IOV on PowerNV Wei Yang
2015-08-05 1:24 ` [PATCH V2 1/6] powerpc/powernv: don't enable SRIOV when VF BAR contains non M64 BAR Wei Yang
2015-08-06 4:35 ` Gavin Shan
2015-08-06 6:10 ` Alexey Kardashevskiy
2015-08-06 6:57 ` Gavin Shan
2015-08-06 7:47 ` Alexey Kardashevskiy
2015-08-06 11:07 ` Gavin Shan
2015-08-06 14:13 ` Wei Yang
2015-08-07 1:24 ` Alexey Kardashevskiy
2015-08-06 14:10 ` Wei Yang
2015-08-07 1:20 ` Gavin Shan
2015-08-07 2:24 ` Wei Yang
2015-08-07 3:50 ` Gavin Shan
2015-08-07 7:14 ` Alexey Kardashevskiy
2015-08-10 1:40 ` Wei Yang
2015-08-05 1:24 ` [PATCH V2 2/6] powerpc/powernv: simplify the calculation of iov resource Wei Yang
2015-08-06 4:51 ` Gavin Shan
2015-08-06 9:00 ` Alexey Kardashevskiy
2015-08-06 9:41 ` Wei Yang
2015-08-06 10:15 ` Alexey Kardashevskiy
2015-08-07 1:36 ` Wei Yang
2015-08-06 13:49 ` Wei Yang
2015-08-07 1:08 ` Gavin Shan
2015-08-05 1:25 ` [PATCH V2 3/6] powerpc/powernv: use one M64 BAR in Single PE mode for one VF BAR Wei Yang
2015-08-06 5:20 ` Gavin Shan
2015-08-06 9:36 ` Wei Yang
2015-08-06 10:07 ` Gavin Shan
2015-08-07 1:48 ` Wei Yang
2015-08-07 8:13 ` Alexey Kardashevskiy
2015-08-06 10:04 ` Alexey Kardashevskiy
2015-08-07 2:01 ` Wei Yang
2015-08-07 8:59 ` Alexey Kardashevskiy
2015-08-10 1:48 ` Wei Yang
2015-08-05 1:25 ` [PATCH V2 4/6] powerpc/powernv: replace the hard coded boundary with gate Wei Yang
2015-08-06 5:26 ` Gavin Shan
2015-08-07 9:11 ` Alexey Kardashevskiy
2015-08-05 1:25 ` [PATCH V2 5/6] powerpc/powernv: boundary the total vf bar size instead of the individual one Wei Yang
2015-08-06 5:28 ` Gavin Shan
2015-08-06 14:03 ` Wei Yang
2015-08-07 1:23 ` Gavin Shan
2015-08-07 2:25 ` Wei Yang
2015-08-05 1:25 ` [PATCH V2 6/6] powerpc/powernv: allocate discrete PE# when using M64 BAR in Single PE mode Wei Yang
2015-08-06 5:36 ` Gavin Shan
2015-08-06 13:41 ` Wei Yang [this message]
2015-08-07 1:36 ` Gavin Shan
2015-08-07 2:33 ` Wei Yang
2015-08-07 3:43 ` Gavin Shan
2015-08-07 5:44 ` Wei Yang
2015-08-07 5:54 ` Gavin Shan
2015-08-07 6:25 ` Wei Yang
2015-08-07 10:00 ` Alexey Kardashevskiy
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