From: Boqun Feng <boqun.feng@gmail•com>
To: Will Deacon <will.deacon@arm•com>
Cc: "linux-kernel@vger•kernel.org" <linux-kernel@vger•kernel.org>,
"linuxppc-dev@lists•ozlabs.org" <linuxppc-dev@lists•ozlabs.org>,
Peter Zijlstra <peterz@infradead•org>,
Ingo Molnar <mingo@kernel•org>,
Benjamin Herrenschmidt <benh@kernel•crashing.org>,
Paul Mackerras <paulus@samba•org>,
Michael Ellerman <mpe@ellerman•id.au>,
Thomas Gleixner <tglx@linutronix•de>,
"Paul E. McKenney" <paulmck@linux•vnet.ibm.com>,
Waiman Long <waiman.long@hp•com>
Subject: Re: [RFC v2 3/7] powerpc: atomic: Implement atomic{,64}_{add,sub}_return_* variants
Date: Tue, 22 Sep 2015 07:37:04 +0800 [thread overview]
Message-ID: <20150921233704.GD970@fixme-laptop.cn.ibm.com> (raw)
In-Reply-To: <20150921232656.GC970@fixme-laptop.cn.ibm.com>
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On Tue, Sep 22, 2015 at 07:26:56AM +0800, Boqun Feng wrote:
> On Mon, Sep 21, 2015 at 11:24:27PM +0100, Will Deacon wrote:
> > Hi Boqun,
> >
> > On Sun, Sep 20, 2015 at 09:23:03AM +0100, Boqun Feng wrote:
> > > On Sat, Sep 19, 2015 at 11:33:10PM +0800, Boqun Feng wrote:
> > > > On Fri, Sep 18, 2015 at 05:59:02PM +0100, Will Deacon wrote:
> > > > > On Wed, Sep 16, 2015 at 04:49:31PM +0100, Boqun Feng wrote:
> > > > > > On powerpc, we don't need a general memory barrier to achieve acquire and
> > > > > > release semantics, so __atomic_op_{acquire,release} can be implemented
> > > > > > using "lwsync" and "isync".
> > > > >
> > > > > I'm assuming isync+ctrl isn't transitive, so we need to get to the bottom
> > > >
> > > > Actually the transitivity is still guaranteed here, I think ;-)
> >
> > The litmus test I'm thinking of is:
> >
> >
> > {
> > 0:r2=x;
> > 1:r2=x; 1:r5=z;
> > 2:r2=z; 2:r4=x;
> > }
> > P0 | P1 | P2 ;
> > li r1,1 | lwz r1,0(r2) | lwz r1,0(r2) ;
> > stw r1,0(r2) | cmpw r1,r1 | cmpw r1,r1 ;
> > | beq LC00 | beq LC01 ;
> > | LC00: | LC01: ;
> > | isync | isync ;
> > | li r4,1 | lwz r3,0(r4) ;
> > | stw r4,0(r5) | ;
> > exists
> > (1:r1=1 /\ 2:r1=1 /\ 2:r3=0)
> >
> >
> > Which appears to be allowed. I don't think you need to worry about backwards
> > branches for the ctrl+isync construction (none of the current example do,
> > afaict).
> >
>
> Yes.. my care of backwards branches is not quite related to the topic, I
> concerned that mostly because my test is using atomic operation, and I
> just want to test the exact asm code.
>
> > Anyway, all the problematic cases seem to arise when we start mixing
> > ACQUIRE/RELEASE accesses with relaxed accesses (i.e. where an access from
> > one group reads from an access in the other group). It would be simplest
> > to say that this doesn't provide any transitivity guarantees, and that
> > an ACQUIRE must always read from a RELEASE if transitivity is required.
> >
>
> Agreed. RELEASE alone doesn't provide transitivity and transitivity is
^^^^^^^
This should be ACQUIRE...
> guaranteed only if an ACQUIRE read from a RELEASE. That's exactly the
> direction which the link (https://lkml.org/lkml/2015/9/15/836) is
> heading to. So I think we are fine here to use ctrl+isync here, right?
>
> Regards,
> Boqun
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next prev parent reply other threads:[~2015-09-21 23:37 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-16 15:49 [RFC v2 0/7] atomics: powerpc: Implement relaxed/acquire/release variants of some atomics Boqun Feng
2015-09-16 15:49 ` [RFC v2 1/7] atomics: Add test for atomic operations with _relaxed variants Boqun Feng
2015-10-12 9:30 ` Will Deacon
2015-10-12 9:38 ` Boqun Feng
2015-09-16 15:49 ` [RFC v2 2/7] atomics: Allow architectures to define their own __atomic_op_* helpers Boqun Feng
2015-09-16 15:49 ` [RFC v2 3/7] powerpc: atomic: Implement atomic{, 64}_{add, sub}_return_* variants Boqun Feng
2015-09-18 16:59 ` [RFC v2 3/7] powerpc: atomic: Implement atomic{,64}_{add,sub}_return_* variants Will Deacon
2015-09-19 15:33 ` Boqun Feng
2015-09-20 8:23 ` Boqun Feng
2015-09-21 22:24 ` Will Deacon
2015-09-21 23:26 ` Boqun Feng
2015-09-21 23:37 ` Boqun Feng [this message]
2015-09-22 15:25 ` Paul E. McKenney
2015-09-23 0:07 ` Boqun Feng
2015-09-25 21:29 ` Paul E. McKenney
2015-09-26 2:18 ` Boqun Feng
2015-09-16 15:49 ` [RFC v2 4/7] powerpc: atomic: Implement xchg_* and atomic{, 64}_xchg_* variants Boqun Feng
2015-10-01 12:24 ` [RFC v2 4/7] powerpc: atomic: Implement xchg_* and atomic{,64}_xchg_* variants Peter Zijlstra
2015-10-01 15:09 ` Paul E. McKenney
2015-10-01 17:13 ` Peter Zijlstra
2015-10-01 18:03 ` Paul E. McKenney
2015-10-01 18:23 ` Peter Zijlstra
2015-10-01 19:41 ` Paul E. McKenney
2015-10-05 14:44 ` Will Deacon
2015-10-05 16:57 ` Paul E. McKenney
2015-10-12 1:17 ` Boqun Feng
2015-10-12 9:28 ` Will Deacon
2015-10-12 23:24 ` Paul E. McKenney
2015-09-16 15:49 ` [RFC v2 5/7] powerpc: atomic: Implement cmpxchg{, 64}_* and atomic{, 64}_cmpxchg_* variants Boqun Feng
2015-10-01 12:27 ` [RFC v2 5/7] powerpc: atomic: Implement cmpxchg{,64}_* and atomic{,64}_cmpxchg_* variants Peter Zijlstra
2015-10-01 12:36 ` Peter Zijlstra
2015-10-01 15:12 ` Paul E. McKenney
2015-10-01 17:11 ` Peter Zijlstra
2015-10-01 15:13 ` Paul E. McKenney
2015-10-10 1:58 ` Boqun Feng
2015-10-11 10:25 ` Boqun Feng
2015-10-12 6:46 ` Peter Zijlstra
2015-10-12 7:03 ` Boqun Feng
2015-09-16 15:49 ` [RFC v2 6/7] powerpc: atomic: Make atomic{, 64}_xchg and xchg a full barrier Boqun Feng
2015-10-01 12:28 ` [RFC v2 6/7] powerpc: atomic: Make atomic{,64}_xchg " Peter Zijlstra
2015-10-01 23:19 ` Boqun Feng
2015-10-02 5:25 ` Peter Zijlstra
2015-09-16 15:49 ` [RFC v2 7/7] powerpc: atomic: Make atomic{, 64}_cmpxchg and cmpxchg " Boqun Feng
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