From: "Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com>
To: benh@kernel•crashing.org, paulus@samba•org, mpe@ellerman•id.au
Cc: linuxppc-dev@lists•ozlabs.org,
"Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com>
Subject: [PATCH v7 7/7] powerpc/mm: Batch tlb flush when invalidating pte entries
Date: Mon, 28 Nov 2016 11:47:04 +0530 [thread overview]
Message-ID: <20161128061704.4914-8-aneesh.kumar@linux.vnet.ibm.com> (raw)
In-Reply-To: <20161128061704.4914-1-aneesh.kumar@linux.vnet.ibm.com>
This will improve the task exit case, by batching tlb invalidates.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux•vnet.ibm.com>
---
arch/powerpc/include/asm/book3s/64/radix.h | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/radix.h b/arch/powerpc/include/asm/book3s/64/radix.h
index 4e88178cf03b..20a4eb4d065a 100644
--- a/arch/powerpc/include/asm/book3s/64/radix.h
+++ b/arch/powerpc/include/asm/book3s/64/radix.h
@@ -140,13 +140,20 @@ static inline unsigned long radix__pte_update(struct mm_struct *mm,
unsigned long new_pte;
old_pte = __radix_pte_update(ptep, ~0, 0);
- asm volatile("ptesync" : : : "memory");
/*
* new value of pte
*/
new_pte = (old_pte | set) & ~clr;
- radix__flush_tlb_pte(old_pte, mm, addr);
- __radix_pte_update(ptep, 0, new_pte);
+ /*
+ * If we are trying to clear the pte, we can skip
+ * the below sequence and batch the tlb flush. The
+ * tlb flush batching is done by mmu gather code
+ */
+ if (new_pte) {
+ asm volatile("ptesync" : : : "memory");
+ radix__flush_tlb_pte(old_pte, mm, addr);
+ __radix_pte_update(ptep, 0, new_pte);
+ }
} else
old_pte = __radix_pte_update(ptep, clr, set);
asm volatile("ptesync" : : : "memory");
--
2.10.2
next prev parent reply other threads:[~2016-11-28 6:17 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-28 6:16 [PATCH v7 0/7] Radix pte update tlbflush optimizations Aneesh Kumar K.V
2016-11-28 6:16 ` [PATCH v7 1/7] powerpc/mm: Rename hugetlb-radix.h to hugetlb.h Aneesh Kumar K.V
2016-11-29 11:33 ` Balbir Singh
2016-11-29 12:58 ` [v7,1/7] " Michael Ellerman
2016-11-28 6:16 ` [PATCH v7 2/7] powerpc/mm/hugetlb: Handle hugepage size supported by hash config Aneesh Kumar K.V
2016-11-29 11:35 ` Balbir Singh
2016-11-28 6:17 ` [PATCH v7 3/7] powerpc/mm: Introduce _PAGE_LARGE software pte bits Aneesh Kumar K.V
2016-11-30 0:14 ` Balbir Singh
2016-11-30 0:35 ` Benjamin Herrenschmidt
2016-11-30 0:50 ` Balbir Singh
2016-11-28 6:17 ` [PATCH v7 4/7] powerpc/mm: Add radix__tlb_flush_pte Aneesh Kumar K.V
2016-11-28 11:42 ` Michael Ellerman
2016-11-28 6:17 ` [PATCH v7 5/7] powerpc/mm: update radix__ptep_set_access_flag to not do full mm tlb flush Aneesh Kumar K.V
2016-11-28 6:17 ` [PATCH v7 6/7] powerpc/mm: update radix__pte_update " Aneesh Kumar K.V
2016-11-28 6:17 ` Aneesh Kumar K.V [this message]
2016-11-29 11:32 ` [PATCH v7 0/7] Radix pte update tlbflush optimizations Balbir Singh
2016-11-30 4:30 ` Michael Ellerman
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