Subject: Re: [RFC][PATCH] powerpc/64s: optimise syscall entry with relon hypercalls

From: Nicholas Piggin <[email-masked]>
Date: Tue, 14 Feb 2017 12:42:31 +1000

On Mon, 13 Feb 2017 11:04:06 +0000
David Laight <[email-masked]> wrote:

> From: Nicholas Piggin
> > Sent: 10 February 2017 18:23
> > After bc3551257a ("powerpc/64: Allow for relocation-on interrupts from
> > guest to host"), a getppid() system call goes from 307 cycles to 358
> > cycles (+17%). This is due significantly to the scratch SPR used by the
> > hypercall.
> > 
> > It turns out there are a some volatile registers common to both system
> > call and hypercall (in particular, r12, cr0, ctr), which can be used to
> > avoid the SPR and some other overheads for the system call case. This
> > brings getppid to 320 cycles (+4%).  
> ...
> > + * syscall register convention is in Documentation/powerpc/syscall64-abi.txt
> > + *
> > + * For hypercalls, the register convention is as follows:
> > + * r0 volatile
> > + * r1-2 nonvolatile
> > + * r3 volatile parameter and return value for status
> > + * r4-r10 volatile input and output value
> > + * r11 volatile hypercall number and output value
> > + * r12 volatile
> > + * r13-r31 nonvolatile
> > + * LR nonvolatile
> > + * CTR volatile
> > + * XER volatile
> > + * CR0-1 CR5-7 volatile
> > + * CR2-4 nonvolatile
> > + * Other registers nonvolatile
> > + *
> > + * The intersection of volatile registers that don't contain possible
> > + * inputs is: r12, cr0, xer, ctr. We may use these as scratch regs
> > + * upon entry without saving.  
> 
> Except that they must surely be set to some known value on exit in order
> to avoid leaking information to the guest.

True. I don't see why that's a problem for the entry code though.

Thanks,
Nick