Subject: [PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite

From: Ivan Mikhaylov <[email-masked]>
Date: Mon, 15 May 2017 16:07:54 +0300

Prevent a kernel panic caused by unintentionally clearing TCR
watchdog bits.  At this point in the kernel boot, the watchdog has
already been enabled by u-boot.  The original code's attempt to
write to the TCR register results in an inadvertent clearing of the
watchdog configuration bits, causing the 476 to reset.
Panic happens in case of error as silently reboot without any outputs
on serial.

Signed-off-by: Ivan Mikhaylov <[email-masked]>
---
 arch/powerpc/kernel/time.c |   16 ++++++++++++++++
 1 files changed, 16 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 2b33cfa..f75e512 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -738,12 +738,28 @@ static int __init get_freq(char *name, int cells, unsigned long *val)
 
 static void start_cpu_decrementer(void)
 {
+	unsigned int tcr;
 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
 	/* Clear any pending timer interrupts */
 	mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
 
+#ifdef CONFIG_FSP2
+	/*
+	 * Prevent a kernel panic caused by unintentionally clearing TCR
+	 * watchdog bits.  At this point in the kernel boot, the watchdog has
+	 * already been enabled by u-boot.  The original code's attempt to
+	 * write to the TCR register results in an inadvertent clearing of the
+	 * watchdog configuration bits, causing the 440 to reset.
+	 */
+	tcr = mfspr(SPRN_TCR);
+	tcr &= TCR_WP_MASK; /* clear all bits except for TCR[WP] */
+	tcr |= TCR_DIE; /* enable decrementer */
+	mtspr(SPRN_TCR, tcr);
+#else
 	/* Enable decrementer interrupt */
 	mtspr(SPRN_TCR, TCR_DIE);
+#endif
+
 #endif /* defined(CONFIG_BOOKE) || defined(CONFIG_40x) */
 }
 
-- 
1.7.1